* Mark generated wires for read and readWrite as temporary
* Remove semicolons
* Remove intermediate wire for read/readWrite port address
* Convert usages of UnlocatableSourceInfo into macro applications

* Add .unsafe to connectables

* Added .as and .squeezeAllAs to connectable

* Make connectable exceptions error at end of elaboration

Bump firtool version to get parsing of new connect/invalidate
statements.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

Fix a bug where the name of the Stub module (a module auto-generated from
an Interface without an implementation available) would be called "Stub"
as opposed to the name of the Interface.  This could create a linker error
if the Stub was used.

Fix this setting the final "desiredName" inside the Entity.  Add a test that
this works for the Stub.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

Add the `circt.clock_gate` intrinsic. This is not yet used anywhere and
has no impact on existing code. Also move CIRCT-specific tests into a
`circt` subpackage of `chiselTests.util` to reflect the main package
structure.

Change an abstract def to a val when specifying the ports of an
Interface.  This improves the static nature of the Interface and prevents
abuse as leaving this a s a def (a function) makes it a generator.

h/t @azidar

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

* Added skipPrefix and tests

* Added MatchesOrOmits

* Support BoringUtils in chisel internally, with tests

Migrate work from seldridge/chisel-separable on separate compilation
into upstream Chisel.  This defines an Interface and a Conformance.  An
Interface is a Singleton Object that maps to a FIRRTL external module
with pre-defined IO.  A Conformance is a type-class whose
implementations define how a Chisel module aligns itself to the
Interface.  Used together, these enable separate compilation of a client
that uses an Interface from a component that implements the Interface.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

This makes it much easier to automate checking new versions as they are
released.

---------

Co-authored-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

Adds new APIs to generate explicit read-write (rdwr) ports for a SyncReadMem, and all masked or clocked variants.
---------

Co-authored-by: Megan Wachs <megan@sifive.com>

This utility provides a way to check different versions of type
equivalence in Chisel internals and generates error messages for when
mismatches are found. Specifically, it handles structural vs. nominal
typing as well as strict vs. non-strict width checking.

This adds a new Chisel template for using Chisel with Scala CLI, and
adds some automation for uploading versions of this template on tagged
releases (or workflow dispatch).

Remove PartialConnect as it is now impossible for this to be emitted by
Chisel.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

Remove deprecated "sonatypeRepo" from firrtl compilation unit.  This is
unnecessary given that the firrtl compilation unit uses "commonSettings"
which already include the non-deprecated versions of the Sonatype
Repositories.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

* Add 3.6 to Chisel Website

* [website] Remove chisel/ baseUrl

Remove the "chisel/" base URL from all website links.  This is no longer
necessary once the website changes to chisel-lang.org.

---------

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

This commit reimplements the previous work adding emission of
annotations via the FIRRTL specification v2.0.0 %[[...]] style.
Now all annotations that were previously emitted to the .anno.json file
are emitted in the .fir file. This uses a slightly hacky new internal
mechanism in firrtl that is already marked deprecated to discourage
users from touching it.

This annotation is being handled in mfc via:
  https://github.com/llvm/circt/pull/4665

The convention lets users define how ports with aggregate types are
lowered to verilog.

This PR cleaned up the old build script, split it to common.sc and
builds.sc two files. common.sc is used for declare the dependencies and
project structual for each modules, which can be reused by other
projects for building from source. build.sc is used for build project in
tree.
This commit makes chisel3[2.13.10] able to compile.

Also switch from Mill's BuildInfo to our own

---------

Co-authored-by: Jack Koenig <koenig@sifive.com>

* the firtool version is now included in the BuildInfo
* firtool now must be on the path when publishing, but is not required
  for building or testing
* FirtoolNonZeroExitCode now no longer includes a stack trace

Add new workflow to generate release notes. This workflow can be run
manually via workflow dispatch, but will also run automatically upon
creating a release. The workflow dispatch can be used for testing,
previewing release notes for a potential release, or for generating
release notes for past releases for when the automation has a bug or
didn't exist.

Also update the PR template and CONTRIBUTING guidelines to include
information about the new required labels and automation. Also
streamline the PR template a little bit to nudge developers towards
putting more information in the "Release Notes" section of the PR
template.

This extends the set of circt intrinsics with Chisel wrappers. These have no impact on code not using them.

Remove the _compatAutoWrapPorts method as this does nothing.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>