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path: root/model/riscv_platform.sail
AgeCommit message (Expand)AuthorFilesLines
2019-09-04Merge remote-tracking branch 'origin/master' into vmem_ext.vmem_extRobert Norton1-4/+4
2019-08-19RISC-V spec, without implicit castsAlasdair Armstrong1-4/+4
2019-07-22Make a custom exception code available for extensions, and remove the E_CHERI...Prashanth Mundkur1-6/+6
2019-07-17Disable mmio devices (clint and htif interfaces) when using RVFI to prevent d...Robert Norton1-1/+8
2019-07-09Add some missed logging guards.Prashanth Mundkur1-22/+41
2019-07-03Add a maximum memory access size to slightly improve C code geneation.Robert Norton1-8/+8
2019-07-01Predicate another bit of tracing.Robert Norton1-1/+2
2019-06-24Add PMP checks to physical memory accesses.Prashanth Mundkur1-0/+6
2019-05-03Fix inconsistency in accessing PC/nextPC, which also clarifies which handlers...Prashanth Mundkur1-1/+1
2019-04-24Add extended model from cheri-merge.Prashanth Mundkur1-25/+30
2019-04-17Fix a 64-bitism.Prashanth Mundkur1-1/+1
2019-03-14Merge branch 'master' into rmem_interpreterJon French1-31/+85
2019-03-12riscv_platform.sail: use externs for platform values even in interpreterJon French1-18/+10
2019-03-04Add defaults for platform values for use when interpretingJon French1-1/+25
2019-02-26Initial cleanup of the prelude, using standard prelude instead when possible.Prashanth Mundkur1-14/+14
2019-02-21Fix the ocaml platform to respect the architectural width.Prashanth Mundkur1-8/+17
2019-02-11Handle 32-bit accesses to the mmio regions and device registers of the clint ...Prashanth Mundkur1-23/+68
2019-02-11Fix xlen variable name.Prashanth Mundkur1-5/+5
2019-02-11Fix 64-bit constants.Prashanth Mundkur1-3/+3
2019-02-08Start parameterizing definitions by xlen, which is currently still 64.Prashanth Mundkur1-6/+6
2019-01-25Tweaks to reservation handling.Prashanth Mundkur1-1/+1
2019-01-21Remove temporary workaround for Lem generationThomas Bauereiss1-5/+5
2019-01-14Reorganize directory structure.Prashanth Mundkur1-0/+295