Remove temporary workaround for Lem generation

Reverts 7df2149

1 files changed, 5 insertions, 5 deletions

diff --git a/model/riscv_platform.sail b/model/riscv_platform.sail
index aee72e4..0749de6 100644
--- a/model/riscv_platform.sail
+++ b/model/riscv_platform.sail
@@ -112,17 +112,17 @@ function clint_load(addr, width) = {
   if addr == MSIP_BASE & ('n == 8 | 'n == 4)
   then {
     print_platform("clint[" ^ BitStr(addr) ^ "] -> " ^ BitStr(mip.MSI()));
-    MemValue(zero_extend_type_hack(mip.MSI(), sizeof(8 * 'n)))
+    MemValue(zero_extend(mip.MSI(), sizeof(8 * 'n)))
   }
   else if addr == MTIMECMP_BASE & ('n == 8)
   then {
     print_platform("clint[" ^ BitStr(addr) ^ "] -> " ^ BitStr(mtimecmp));
-    MemValue(zero_extend_type_hack(mtimecmp, 64)) /* FIXME: Redundant zero_extend currently required by Lem backend */
+    MemValue(zero_extend(mtimecmp, 64)) /* FIXME: Redundant zero_extend currently required by Lem backend */
   }
   else if addr == MTIME_BASE & ('n == 8)
   then {
     print_platform("clint[" ^ BitStr(addr) ^ "] -> " ^ BitStr(mtime));
-    MemValue(zero_extend_type_hack(mtime, 64))
+    MemValue(zero_extend(mtime, 64))
   }
   else {
     print_platform("clint[" ^ BitStr(addr) ^ "] -> <not-mapped>");
@@ -194,7 +194,7 @@ function htif_load(addr, width) = {
   print_platform("htif[" ^ BitStr(addr) ^ "] -> " ^ BitStr(htif_tohost));
   /* FIXME: For now, only allow the expected access widths. */
   if width == 8
-  then MemValue(zero_extend_type_hack(htif_tohost, 64))  /* FIXME: Redundant zero_extend currently required by Lem backend */
+  then MemValue(zero_extend(htif_tohost, 64))  /* FIXME: Redundant zero_extend currently required by Lem backend */
   else MemException(E_Load_Access_Fault)
 }
 
@@ -292,4 +292,4 @@ function platform_wfi() -> unit = {
     mtime  = mtimecmp;
     mcycle = mtimecmp;
   }
-}
\ No newline at end of file
+}