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AgeCommit message (Expand)AuthorFilesLines
2021-03-10stlink: fix execution order in stlink_config_trace()Antonio Borneo1-1/+1
2021-03-10armv7m_trace_itm_config: wait for ITMBusy to be clearedAdrian Negreanu2-0/+30
2021-03-10target: Remove redundant initialization of endiannessYasushi SHOJI1-3/+0
2021-03-10target/mips: Remove typedef'd structMarc Schink4-10/+10
2021-03-05RISC-V Freertos support (#582)Tim Newsome9-0/+18
2021-03-04target: avoid polling during 'resumed' event handlerAntonio Borneo1-0/+11
2021-02-13target: use proper macro for parsing watchpoint addressPeter Mamonov1-4/+4
2021-02-11From upstream (#580)Tim Newsome9-57/+62
2021-02-04Fix in write_memory_bus_v1: Read sbcs properly (#578)Jan Matyas1-16/+38
2021-01-29Add memory access while running to `riscv info` (#576)Tim Newsome2-0/+25
2021-01-29Select current hart before accessing vector regs. (#574)Tim Newsome1-1/+8
2021-01-29Minor cleanups. (#573)Tim Newsome1-7/+7
2021-01-28Add authdata_read/authdata_write support to 0.11. (#575)Tim Newsome4-18/+112
2021-01-20riscv-013: Fix comment for register_read() (#569)Jan Matyas1-1/+1
2021-01-18Remove `-rtos riscv` (#567)Tim Newsome4-1070/+270
2021-01-18cortex_m: [FIX] ARMv8-M does not support VECTRESETTarek BOCHKATI1-2/+2
2021-01-18target/riscv: fix build error with -Werror=maybe-uninitializedTarek BOCHKATI1-1/+1
2021-01-14Don't write to zero.Tim Newsome1-0/+5
2021-01-13openocd: fix doxygen parameters of functionsAntonio Borneo7-43/+47
2021-01-13openocd: fix incorrect doxygen commentsAntonio Borneo1-12/+12
2021-01-13riscv: Fix comment in read_memory_progbufCraig Blackmore1-2/+2
2021-01-13target: fix memory leak on multiple '-gdb-port' flagAntonio Borneo1-0/+1
2020-12-31Merge branch 'master' into from_upstreamTim Newsome50-990/+1818
2020-12-26cortex-a: fix reset on dapdirect transportsAntonio Borneo1-2/+2
2020-12-26armv7m_trace: stop getting traces from adapter at exitAntonio Borneo3-0/+21
2020-12-14Add `riscv info` command. (#558)Tim Newsome3-0/+57
2020-12-14Fix error handling in read_memory_progbuf_one(). (#560)Tim Newsome1-11/+14
2020-12-14Clear sbcs.sbbusyerror without affecting other sbcs bits (#547)Jan Matyas1-3/+3
2020-12-05target/register: use an array of uint8_t for register's valueAntonio Borneo6-7/+7
2020-12-05mips_mips64: fix minor host endianness bugAntonio Borneo1-1/+1
2020-12-05arm7_9_common: fix host endianness bug in arm7_9_full_context()Antonio Borneo1-4/+20
2020-12-05armv4_5: fix output of command 'arm reg'Antonio Borneo1-0/+3
2020-12-05armv4_5: fix segmentation fault in command 'arm reg'Antonio Borneo1-0/+1
2020-12-02Add initial RTT supportMarc Schink5-2/+482
2020-12-02adi_v5_swd: wait for readable DPIDR, ABORT if stalledTomas Vanek1-13/+56
2020-12-02arm_adi_v5: prevent possibly endless recursion in dap_dp_init()Tomas Vanek3-23/+43
2020-11-15target/armv7m, cortex_m: fix misleading commentsTomas Vanek2-6/+9
2020-11-15target/cortex_m: remove wrong xPSR.ICI/IT bits handlingTomas Vanek1-6/+0
2020-11-15target/armv7m: use arch_info[i].value instead of allocated memoryTomas Vanek2-6/+1
2020-11-15cortex_m: use the new enum ARMV7M_REGSEL_nameAntonio Borneo1-1/+1
2020-11-15target/cortex_m,hla_target: rework Cortex-M register handling part 4Tomas Vanek2-227/+8
2020-11-15target/armv7m: rework Cortex-M register handling part 3Tomas Vanek4-165/+159
2020-11-15target/armv7m: rework Cortex-M register handling part 2Tomas Vanek2-37/+3
2020-11-15target/armv7m: rework Cortex-M register handling part 1Tomas Vanek4-107/+194
2020-11-15target, register: allow a register hidden from gdb and 'reg' cmdTomas Vanek3-2/+4
2020-11-15flash/stmqspi: minor fixes on coding styleAntonio Borneo1-1/+1
2020-11-11target/cortex_m: Change sleep to running stateKevin Yang2-7/+3
2020-11-08Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interfaceAndreas Bolsch4-4/+170
2020-11-07target/arm7tdmi: remove unused/deprecated function parameterAntonio Borneo1-81/+78
2020-11-07target: Examine subsequent targets after failureKevin Yang1-3/+5
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