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author | Bill Traynor <wmat@riscv.org> | 2022-11-27 16:30:22 -0500 |
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committer | Bill Traynor <wmat@riscv.org> | 2022-11-27 16:30:22 -0500 |
commit | bb2ad13b635cd1d7e3c31df9e6d14967d3daf63b (patch) | |
tree | 7e3efe484d5fe9bfa224189da8bcf4d27d32d8a1 | |
parent | fd582cbdb3ec2dd7d3a775f27b78cbf7e53232fa (diff) | |
download | riscv-isa-manual-bb2ad13b635cd1d7e3c31df9e6d14967d3daf63b.zip riscv-isa-manual-bb2ad13b635cd1d7e3c31df9e6d14967d3daf63b.tar.gz riscv-isa-manual-bb2ad13b635cd1d7e3c31df9e6d14967d3daf63b.tar.bz2 |
Making opcode tables match LaTeX.
Added in missing values.
-rw-r--r-- | src/images/wavedrom/int-comp-slli-srli-srai.adoc | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/images/wavedrom/int-comp-slli-srli-srai.adoc b/src/images/wavedrom/int-comp-slli-srli-srai.adoc index 89dfa4c..addb74b 100644 --- a/src/images/wavedrom/int-comp-slli-srli-srai.adoc +++ b/src/images/wavedrom/int-comp-slli-srli-srai.adoc @@ -5,11 +5,11 @@ [wavedrom, ,] .... {reg: [ - {bits: 7, name: 'opcode', attr: 'OP-IMM', type: 8}, - {bits: 5, name: 'rd', attr: 'dest', type: 2}, + {bits: 7, name: 'opcode', attr: ['OP-IMM', 'OP-IMM', 'OP-IMM'], type: 8}, + {bits: 5, name: 'rd', attr: ['dest', 'dest', 'dest'], type: 2}, {bits: 3, name: 'func3', attr: ['SLLI', 'SRLI', 'SRAI'], type: 8}, - {bits: 5, name: 'rs1', attr: 'src', type: 4}, - {bits: 5, name: 'imm[4:0]', attr: 'shamt[4:0]', type: 3}, + {bits: 5, name: 'rs1', attr: ['src', 'src', 'src'], type: 4}, + {bits: 5, name: 'imm[4:0]', attr: ['shamt[4:0]', 'shamt[4:0]', 'shamt[4:0]'], type: 3}, {bits: 7, name: 'imm[11:5]', attr: [0, 0, 32], type: 8} ]} .... |