1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
|
//FROM ## 2.4 Integer Computational Instructions
//### Integer Register-Immediate Instructions
//
[wavedrom, ,]
....
{reg: [
{bits: 7, name: 'opcode', attr: 'OP-IMM', type: 8},
{bits: 5, name: 'rd', attr: 'dest', type: 2},
{bits: 3, name: 'func3', attr: ['SLLI', 'SRLI', 'SRAI'], type: 8},
{bits: 5, name: 'rs1', attr: 'src', type: 4},
{bits: 5, name: 'imm[4:0]', attr: 'shamt[4:0]', type: 3},
{bits: 7, name: 'imm[11:5]', attr: [0, 0, 32], type: 8}
]}
....
|
