Merge pull request #1447 from riscv/kersten1-patch-2riscv-isa-release-353e88f-2024-06-11

Updating wavedrom

4 files changed, 22 insertions, 22 deletions

diff --git a/src/images/wavedrom/c-cs-format-ls.adoc b/src/images/wavedrom/c-cs-format-ls.adoc
index 59c5a36..1f759a7 100644
--- a/src/images/wavedrom/c-cs-format-ls.adoc
+++ b/src/images/wavedrom/c-cs-format-ls.adoc
@@ -5,9 +5,9 @@
 ....
 {reg: [
   {bits: 2, name: 'op',     type: 8, attr: ['2', 'C0','C0','C0','C0','C0']},
-  {bits: 3, name: 'rs2`',   type: 3, attr: ['3', 'src','src','src','src','src']},
+  {bits: 3, name: 'rs2ʹ',   type: 3, attr: ['3', 'src','src','src','src','src']},
   {bits: 2, name: 'imm',    type: 2, attr: ['2', 'offset[2|6]','offset[7:6]','offset[7:6]','offset[2|6]','offset[7:6]']},
-  {bits: 3, name: 'rs1`',   type: 3, attr: ['3', 'base','base','base','base','base']},
+  {bits: 3, name: 'rs1ʹ',   type: 3, attr: ['3', 'base','base','base','base','base']},
   {bits: 3, name: 'imm',    type: 3, attr: ['3', 'offset[5:3]','offset[5:3]','offset[5|4|8]','offset[5:3]','offset[5:3]']},
   {bits: 3, name: 'funct3', type: 8, attr: ['3', 'C.SW','C.SD','C.SQ','C.FSW','C.FSD']},
 ], config: {bits: 16}}
diff --git a/src/images/wavedrom/cr-register.adoc b/src/images/wavedrom/cr-register.adoc
index f4043d2..63286e4 100644
--- a/src/images/wavedrom/cr-register.adoc
+++ b/src/images/wavedrom/cr-register.adoc
@@ -38,7 +38,7 @@
 ....
 {reg: [
   {bits: 2, name: 'op',     type: 8},
-  {bits: 3, name: 'rd`',    type: 2},
+  {bits: 3, name: 'rdʹ',    type: 2},
   {bits: 8, name: 'imm',    type: 3},
   {bits: 3, name: 'funct3', type: 8},
 ]}
@@ -48,9 +48,9 @@
 ....
 {reg: [
   {bits: 2, name: 'op',     type: 8},
-  {bits: 3, name: 'rd`',    type: 2},
+  {bits: 3, name: 'rdʹ',    type: 2},
   {bits: 2, name: 'imm',    type: 3},
-  {bits: 3, name: 'rs1`',   type: 4},
+  {bits: 3, name: 'rs1ʹ',   type: 4},
   {bits: 3, name: 'imm',    type: 3},
   {bits: 3, name: 'funct3', type: 8},
 ]}
@@ -60,9 +60,9 @@
 ....
 {reg: [
   {bits: 2, name: 'op',     type: 8},
-  {bits: 3, name: 'rs2`',   type: 4},
+  {bits: 3, name: 'rs2ʹ',   type: 4},
   {bits: 2, name: 'imm',    type: 3},
-  {bits: 3, name: 'rs1`',   type: 4},
+  {bits: 3, name: 'rs1ʹ',   type: 4},
   {bits: 3, name: 'imm',    type: 3},
   {bits: 3, name: 'funct3', type: 8},
 ]}
@@ -72,9 +72,9 @@
 ....
 {reg: [
   {bits: 2, name: 'op',     type: 8},
-  {bits: 3, name: 'rs2`',   type: 4},
+  {bits: 3, name: 'rs2ʹ',   type: 4},
   {bits: 2, name: 'funct2', type: 8},
-  {bits: 3, name: 'rd`/rs1`',   type: 7},
+  {bits: 3, name: 'rdʹ/rs1ʹ',   type: 7},
   {bits: 6, name: 'funct6', type: 8},
 ]}
 ....
@@ -84,7 +84,7 @@
 {reg: [
   {bits: 2, name: 'op',     type: 8},
   {bits: 5, name: 'offset', type: 3},
-  {bits: 3, name: 'rd`/rs1`',   type: 7},
+  {bits: 3, name: 'rdʹ/rs1ʹ',   type: 7},
   {bits: 3, name: 'offset', type: 3},
   {bits: 3, name: 'funct3', type: 8},
 ]}
diff --git a/src/images/wavedrom/cr-registers-new.adoc b/src/images/wavedrom/cr-registers-new.adoc
index 805b3cb..46a34e6 100644
--- a/src/images/wavedrom/cr-registers-new.adoc
+++ b/src/images/wavedrom/cr-registers-new.adoc
@@ -4,7 +4,7 @@
 ${wd({reg: [
   {bits: 2, name: 'op',     type: 8},
   {bits: 5, name: 'rs2',    type: 4},
-  {bits: 5, name: 'rd / rs1', type: 7},
+  {bits: 5, name: 'rd / rs1ʹ, type: 7},
   {bits: 4, name: 'funct4', type: 8},
 
   {bits: 2, name: 'op',     type: 8},
@@ -19,33 +19,33 @@ ${wd({reg: [
   {bits: 3, name: 'funct3', type: 8},
 
   {bits: 2, name: 'op',     type: 8},
-  {bits: 3, name: 'rd`',    type: 2},
+  {bits: 3, name: 'rdʹ',    type: 2},
   {bits: 8, name: 'imm',    type: 3},
   {bits: 3, name: 'funct3', type: 8},
 
   {bits: 2, name: 'op',     type: 8},
-  {bits: 3, name: 'rd`',    type: 2},
+  {bits: 3, name: 'rdʹ',    type: 2},
   {bits: 2, name: 'imm',    type: 3},
-  {bits: 3, name: 'rs1`',   type: 4},
+  {bits: 3, name: 'rs1ʹ',   type: 4},
   {bits: 3, name: 'imm',    type: 3},
   {bits: 3, name: 'funct3', type: 8},
 
   {bits: 2, name: 'op',     type: 8},
-  {bits: 3, name: 'rs2`',   type: 4},
+  {bits: 3, name: 'rs2ʹ',   type: 4},
   {bits: 2, name: 'imm',    type: 3},
-  {bits: 3, name: 'rs1`',   type: 4},
+  {bits: 3, name: 'rs1ʹ',   type: 4},
   {bits: 3, name: 'imm',    type: 3},
   {bits: 3, name: 'funct3', type: 8},
 
   {bits: 2, name: 'op',     type: 8},
-  {bits: 3, name: 'rs2`',   type: 4},
+  {bits: 3, name: 'rs2ʹ',   type: 4},
   {bits: 2, name: 'funct2', type: 8},
-  {bits: 3, name: 'rd` / rs1`',   type: 7},
+  {bits: 3, name: 'rd` / rs1ʹ',   type: 7},
   {bits: 6, name: 'funct6', type: 8},
 
   {bits: 2, name: 'op',     type: 8},
   {bits: 5, name: 'offset', type: 3},
-  {bits: 3, name: 'rd` / rs1`',   type: 7},
+  {bits: 3, name: 'rd` / rs1ʹ',   type: 7},
   {bits: 3, name: 'offset', type: 3},
   {bits: 3, name: 'funct3', type: 8},
 
@@ -59,4 +59,4 @@ ${wd({reg: [
   margin: {right: width / 4},
   label: {right: ['CR : Register', 'CI : Immediate', 'CSS : Stack-relative Store', 'CIW : Wide Immediate', 'CL : Load', 'CS : Store', 'CA : Arithmetic', 'CB : Branch/Arithmetic', 'CJ : Jump']}
 }})}
-....
\ No newline at end of file
+....
diff --git a/src/images/wavedrom/reg-based-ldnstr.adoc b/src/images/wavedrom/reg-based-ldnstr.adoc
index 24d430b..ea9e245 100644
--- a/src/images/wavedrom/reg-based-ldnstr.adoc
+++ b/src/images/wavedrom/reg-based-ldnstr.adoc
@@ -5,9 +5,9 @@
 ....
 {reg: [
   {bits: 2, name: 'op', attr: ['2', 'C0', 'C0', 'C0', 'C0', 'C0'], type: 8},
-  {bits: 3, name: 'rd`',  attr: ['3', 'dest', 'dest','dest','dest','dest'], type: 3},
+  {bits: 3, name: 'rdʹ',  attr: ['3', 'dest', 'dest','dest','dest','dest'], type: 3},
   {bits: 2, name: 'imm', attr:['2', 'offset[2|6]', 'offset[7:6]', 'offset[7:6]', 'offset[2|6]', 'offset[7:6]'], type: 2},
-  {bits: 3, name: 'rs1`', attr: ['3', 'base', 'base', 'base', 'base', 'base'], type: 2},
+  {bits: 3, name: 'rs1ʹ', attr: ['3', 'base', 'base', 'base', 'base', 'base'], type: 2},
   {bits: 3, name: 'imm',  attr: ['3', 'offset[5:3]', 'offset[5:3]', 'offset[5|4|8]', 'offset[5:3]', 'offset[5:3]'], type: 3},
   {bits: 3, name: 'funct3',  attr: ['3', 'C.LW', 'C.LD', 'C.LQ', 'C.FLW', 'C.FLD'], type: 8},
 ], config: {bits: 16}}