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AgeCommit message (Expand)AuthorFilesLines
2023-02-13Fix ma_fetch test for norvc (#454)Yujia Qiao1-1/+1
2023-01-19Fix ma_fetch test for writable misa.C (#449)Jerry Zhao1-3/+3
2022-12-28Fix ma_fetch test to support systems where no RVC does not imply IALIGN=32Jerry Zhao1-9/+31
2022-12-07zicntr: separate cycle/instret accessibility test (#439)Chih-Min Chao1-8/+0
2022-06-07Set TESTNUM before executing code.Tim Newsome1-3/+2
2021-07-21Move the Svnapot test to its own folder (#351)Daniel Lustig2-173/+0
2021-07-19Add a test for Svnapot (#349)Daniel Lustig2-0/+173
2021-06-01Enable access to cycle counter before trying to write itAndrew Waterman1-0/+13
2021-06-01Test all four ways of reading a read-only CSRAndrew Waterman1-0/+8
2021-05-12Fix for rv64mi/sbreak and rv64mi/scall that I broke in my previous commit: (#...SLAMET RIANTO2-0/+2
2021-05-10Fixes for illegal.S to support Bare-SMode and sbreak.S & scall.S to support C...SLAMET RIANTO2-0/+14
2020-12-08Add rd=x0 test case to csr test (#308)Takahiro1-0/+1
2020-11-20Only attempt to build tests supported by compilerAndrew Waterman1-2/+0
2020-03-21Fix regression introduced by 24d7d6b68c5581c36cbdef354b1882a7a8dd52c5Andrew Waterman1-7/+7
2020-03-18Have both rs=rd and rs!=rd cases in csr.S (#263)Takahiro1-12/+15
2020-03-11Add comment explaining convoluted rv64mi-p-scall behaviorAndrew Waterman1-0/+6
2020-03-11Revert "scall: make the intention of the test in machine mode more clear (#246)"Andrew Waterman1-6/+1
2020-03-11Setup a multilevel page table to avoid misaligned superpages caused by variab...Cedric Orban1-0/+4
2020-03-06Don't assume reset state of mscratch (#254)Paul Donahue1-1/+1
2020-02-21scall: make the intention of the test in machine mode more clear (#246)Nils Asmussen1-1/+6
2020-02-20Fix rv64mi-p-csr on systems with FPUsAndrew Waterman1-2/+3
2020-01-31Added CSR test cases on whether writing 0 to CSR works, as that might get ove...Torbjørn Viem Ness1-0/+2
2019-11-04Remove cruft from icache-alias testAndrew Waterman1-35/+0
2019-11-04Add rv64si-p-icache-aliasAndrew Waterman2-0/+177
2018-08-21Changing the register mstatus is read into (#152)Srivatsa Yogendra1-2/+2
2018-08-20Revert "Fix to solve the failing tests shamt, csr and scall (#151)"Andrew Waterman2-52/+5
2018-08-17Fix to solve the failing tests shamt, csr and scall (#151)Srivatsa Yogendra2-5/+52
2018-03-21Make misa.C test conform to Hauser proposalAndrew Waterman1-43/+10
2018-02-27Add test for clearing misa.C while PC is misaligned (#117)Andrew Waterman1-1/+79
2017-11-27Rename sbadaddr to satpAndrew Waterman1-1/+1
2017-11-22Check sepc for rv64si/scall test. (#107)Christopher Celio1-0/+4
2017-11-11Make sure that code is 4-byte aligned before disabling rvc (#100)Andrew Waterman1-0/+1
2017-11-09Make rv64mi-p-ecall work when U-mode is not presentAndrew Waterman1-1/+17
2017-11-09Use mstatus.MPP to check existence of U-modeAndrew Waterman1-5/+6
2017-11-01SBREAK test now checks EPC value. (#92)Christopher Celio1-0/+4
2017-10-30Declare trap handlers as global symbols. (#87)Richard Xia5-0/+5
2017-10-26Verify that mtval/stval is written correctly on misaligned fetchAndrew Waterman1-1/+9
2017-10-26Fix rv64mi-csr for the case where U-mode is not available. (#86)Richard Xia1-0/+16
2017-09-01Improve ma_fetch test to cover JAL and branchesAndrew Waterman1-1/+48
2017-08-07rv64[ms]i-csr: Only emit F instructions when compiled for F.Richard Xia1-1/+6
2017-05-05Check UXL in sstatusAndrew Waterman1-0/+5
2017-05-05Test that superpage PTEs trap when PPN LSBs are setAndrew Waterman1-0/+18
2017-05-05Regularize control flow in dirty-bit testAndrew Waterman1-8/+12
2017-03-30Expand dirty-bit test to test MPRV and SUMAndrew Waterman1-27/+30
2017-03-27Separate page faults from physical memory access exceptionsAndrew Waterman1-1/+1
2017-03-21Allow supervisor access to user pages in dirty-bit testAndrew Waterman1-1/+1
2017-03-09Permit flexible dirty-bit behaviorAndrew Waterman1-16/+26
2016-11-01Make sure FP stores don't write memory if mstatus.FS=0.Andrew Waterman1-8/+22
2016-08-26Update to new breakpoint & counter specAndrew Waterman1-6/+6
2016-07-22skip user-mode trap tests in rv32mi/rv64mi-p-csr if no user modeHoward Mao1-0/+9
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