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2020-01-29tcl: replace command "interface" with "adapter driver"Antonio Borneo111-111/+111
Avoid annoying "deprecated" messages while running the scripts distributed with OpenOCD code. Change automatically created with command sed -i 's/^interface /adapter driver /' $(find tcl/ -type f) Change-Id: I2291dfb96e164beecbeb3366ce83f9df2ad6c197 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5283 Reviewed-by: Marc Schink <dev@zapb.de> Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-27tcl/board: Add config for STM32WB Nucleo boardMarc Schink1-0/+11
Change-Id: Ic29802306c706bcf3e261c60facd01d101c9e1ce Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: http://openocd.zylin.com/5358 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Ilya Kharin <akscram@gmail.com>
2020-01-16flash/nor: add support of STM32WB on top STM32L4 flash driverTarek BOCHKATI1-0/+103
Change-Id: I9fb6700085d817d35a691f6484193f67939a4e0f Signed-off-by: Laurent LEMELE <laurent.lemele@st.com> Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/4933 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14stlink: add DAP direct driverAntonio Borneo1-0/+17
STLINK-V3 and the new firmware V2J24 for ST-LINK/V2 provide API to directly access the DAP registers. This mode permits to use the native target in cortex_m.c, with no need to override it with the target in hla_target.c. Other advantages wrt HLA are: support for Cortex-A cores, support for SoC multi-core and/or multi AP, support for OpenOCD commands "dap" thus including control of CSW. This obsoletes the existing HLA driver for ST-Link, that should anyway be kept for those cases where it's not possible to update the ST-Link firmware. This commit introduces the minimal implementation for direct DAP access. The implementation is much slower than the HLA because every memory transfer requires several USB packets. Further commits will close the performance gap. The whole ST-Link driver is compiled under BUILD_HLADAPTER, to remove the need to split the driver between the two modes. This has to be reworked, but it's quite invasive! A new interface file stlink-dap.cfg is added and should be used in place of stlink.cfg to enable the DAP mode. Documentation is updated and reports limitation on the maximum AP number that can be accessed by ST-Link for some firmware already tested. Change-Id: I932ffe16bc81d00b1fe489e2944fda13470cce9b Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4904 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02tcl: update scripts after "jtag_reset" got deprecatedAntonio Borneo6-13/+13
Avoid annoying "deprecated" messages in the scripts distributed with OpenOCD code. Change-Id: I82d27cd420db30f0653efbd286a627ef56a8c1fd Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5287 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02tcl/target: swm050: fix to allow to use with ST-LinkIcenowy Zheng1-2/+5
Currently the code assumes the adapter uses raw SWD, and the expected ID code of the CPU is even wrong. An adapter speed is also not specified. All these prevents the config file to be used with ST-Link. Fix the config file, to allow it to be used with ST-Link. Change-Id: I1244320fabfe8ee23da5a56a592dbeddc72cc8d5 Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-on: http://openocd.zylin.com/5297 Tested-by: jenkins Reviewed-by: Caleb Szalacinski <contact@skiboy.net> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-07target/stm32h7x: add support of dual core variant of STM32H7Tarek BOCHKATI3-17/+158
STM32H7x7 and STM32H7x5 devices contains two cores : CM7 + CM4 The second core creation is only done when * DUAL_CORE variable is set to true * non HLA interface is used A second check for the second core existence is done in cpu1 examine-end Once the second core is detected it gets examined. Furthermore, the script provides a configurable CTI usage in order to halt the cores simultaneously. Tested on Rev X and V devices. PS: the indentation was a mix of spaces and tabs, all changed to tabs. Change-Id: Iad9c30826965ddb9be5dee628bc2e63f953bbcb8 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5130 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-11-27target/stm32h7x: Use AP2 to access DBGMCU when non HLA adapter is usedChristopher Head1-6/+42
The STM32H7 has three access ports. The DBGMCU component is available through AP0 at 0x5C001000 and through AP2 at 0xE00E1000. Using the latter is preferable for early configuration because it works in all power states and while SRST is asserted, whereas the former does not. Change-Id: Iaf8f01d769efb6655040060a8e1e951e1f7e50ab Signed-off-by: Christopher Head <chead@zaber.com> Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/4742 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-10-18Fix wrong end-of-region calculationPiotr Kasprzyk1-1/+1
Correct check for end-of-region is: $BASE + $LEN > $ADDRESS And it is currently (wrongly) calculated as: $ADDRESS > $BASE - $LEN Change-Id: If10bfee19b0c7dbc085731ac1eda943f5d8a36a3 Signed-off-by: Piotr Kasprzyk <ciri@ciri.pl> Reviewed-on: http://openocd.zylin.com/4798 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-10-18tcl/target: Add Infineon TLE987xAndreas Färber1-0/+36
Prepare a config for Infineon TLE9879. Change-Id: Ic667ae822fd514cac365993bc3f39b4185f1a118 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/4339 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-10-18stm32l0|l1: don't corrupt RCC registersFelipe Balbi2-4/+7
instead of overwriting Reset settings, let's read-modify-write RCC registers. Change-Id: I21b7e26e6007d3c3d73803c681c980c6947f5910 Signed-off-by: Felipe Balbi <balbi@kernel.org> Reviewed-on: http://openocd.zylin.com/3601 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-10-15Update FTDI C232HM cfg, and add two new cfgs from cable modem researchAl Dyrius3-2/+91
Change-Id: Idbeffcd5ff4380b1e7c9fd5ef6ba3ca77cc22d99 Signed-off-by: Al Dyrius <aldyrius42@gmail.com> Reviewed-on: http://openocd.zylin.com/5307 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-09-20tcl/board: Add Rigado BMD-300 Evaluation KitMarc Schink1-0/+11
Change-Id: Iba8e12818e2041e51214dab413eb57f0e5bf3f75 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/5218 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-09-08flash/nor: flash driver for Synwit SWM050 MCUsCaleb Szalacinski1-0/+45
SWM050 is a series of MCU product by Foshan Synwit Tech, which is available in TSSOP-8 or SSOP-16 packages. Adds flash driver for the internal 8KiB flash of the MCU. The registers are based on reverse engineering the J-Flash blob provided by the vendor. Also adds a pre-made cfg file. Change-Id: I0b29f0c0d062883542ee743e0750a4c6b6609ebd Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Caleb Szalacinski <contact@skiboy.net> Reviewed-on: http://openocd.zylin.com/4927 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-06-19tcl/board: Add SAML11 Xplained Pro Evaluation KitMarc Schink1-0/+10
Change-Id: I118929cdecd9ba1f39d6e2791c114ac7e347b3f5 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/5206 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-19tcl/target: Add initial Microchip SAML1x supportMarc Schink1-0/+31
There is not flash bank support at the moment. Change-Id: I833c009d9d21cdeb70b57d67eb557d50ed0fb4de Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/5205 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-19Configs for ARM corelink SSE-200 target and Musca A boardOmair Javaid2-0/+115
This patch adds configuration files for ARM CoreLink SSE-200 SoCs. Also adds configuration file for SSE-200 based Musca A board. Flash programming support for Musca A QSPI flash is still not functional. This configuration will be updated once that support lands into OpenOCD. Please refer to ARM documentation for more information about SSE-200 and Musca A. Change-Id: Id3783c34d6e2609d659ef91c0bf7252c39439874 Signed-off-by: Omair Javaid <omair.javaid@linaro.org> Reviewed-on: http://openocd.zylin.com/5006 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-05-23stm32f7x: Use CHIPNAME-specific name for ITCM bankChristopher Head1-3/+12
Change-Id: Icf67eaecd56ac3fb88bcfa2b7084b846109454e6 Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/5102 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2019-05-20tcl/target: Fix V3M/V3H SoC chipnameMarek Vasut1-4/+4
The V3M SoC is R8A77970 while the V3H SoC is R8A77980 . Update the CHIPNAME and swap the SoCs to keep the list sorted. Change-Id: I7e1777c0c7181e5e0beac98333f2047cb443d0df Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5140 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-05-20tcl/target: Add Renesas RZ/A1H targetMarek Vasut1-0/+25
Add configuration for the Renesas RZ/A1H target. This is an SoC with one Cortex A9 ARMv7a core and up to 10 MiB of on-SoC SRAM. Change-Id: I20fd54b385fe1ba1cc325451c3fdfa3a835d4884 Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5141 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-05-20tcl/board: Add Renesas RZ/A1H GR-Peach boardMarek Vasut1-0/+5
Add configuration for the Renesas RZ/A1H GR-Peach board, which is a cheap development kit for the RZ/A1H SoC. Change-Id: I7f5596ae47e6dff8e6d06cffd4dddca20f57d0ca Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5142 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-05-14tcl/psoc4: remove "ocd_" prefixed commandsAntonio Borneo1-1/+1
The commands prefixed with "ocd_" are removed. Remove them from configuration files. Change-Id: Ib44627ee17a39f3d06b479507ab5a025073bf9a8 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5090 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2019-04-24target/imx8m: Cleanup defaultsLeonard Crestez1-2/+8
* Add mem_ap for direct access to axi bus (without halting cpu) * Mark m4 core with -defer-examine because it's not used by default * Make a53.0 default target since it's the boot core Change-Id: Id031533c5d4af346eb08a9ac2532fa1bca602913 Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5036 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24target/imx6ul: Initial supportLeonard Crestez1-0/+50
Unlike the rest of imx6 the 6UL 6ULL 6ULZ chips are based on Cortex-A7 which is at a different address so a custom script is required. Tested on imx6ull-14x14-evk Change-Id: I72822d2241045c318389fadbc66d7aaabaaf4cb5 Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5040 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24target/imx6sx: Initial supportLeonard Crestez1-0/+50
Unlike the rest of imx6 a Cortex-M4 was added with a second CoreSight DAP so a separate script is required. Tested on imx6sx-sdb running linux Change-Id: I1561910b233015f42508f341175822c0827655ec Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5041 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24target/imx7ulp: Initial supportLeonard Crestez1-0/+36
Unlike imx7d/solo supported by imx7.cfg the M4 core is on a different AP and is always running by default so no -defer-examine is required. There is also only one Cortex-A7 Tested on imx7ulp-evk Change-Id: Ifa923d1b9a372c788e6654bc2233fd4d9073a32d Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5043 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24tcl/board: Add config for the Amazon Kindle 2 and DXAlexander Kurz1-0/+181
Add a config to access the Amazon Kindle Model No. D00701 and D00801. Both ebook readers are based on a Freescale i.MX31. A JTAG interface is included in a 40 pin FFC connector marked "J9" on both variants. Change-Id: I58bb1ded3d6706bc3798af488ca8bafb7dc45225 Signed-off-by: Alexander Kurz <akurz@blala.de> Reviewed-on: http://openocd.zylin.com/3956 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10target/imx6: Update list of supported TAPIDsLeonard Crestez1-8/+29
Copy all SJC TAPIPs from imx6 reference manuals. Some imx6 chips are based on Cortex-A7 or have an additional Cortex-M4 and need separate scripts. Change-Id: I3b07d94058c2c5e6313cfc8bb43134a90682a62e Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5034 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10target/imx6: Fix indentation in DAP_TAPID handlingLeonard Crestez1-2/+2
OpenOCD scripts are usually indented with 4 spaces but here there are 8. Change-Id: Iaad53e3b377d246d99119bb7bb5fd75d4422f564 Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5039 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10target/imx6: Add -ignore-versionLeonard Crestez1-0/+1
Looking through imx6 manuals all of them claim that "In follow-on silicon revisions the ID value is subject to change by incrementing the first nibble". Handle this by passing -ignore-version to jtag newtap command. Change-Id: I7fc4779f9757d527ea20a5174a8c90f919580013 Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5031 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10target/imx7: Add ahb mem_apLeonard Crestez1-0/+5
This allows bus access even when CPU is off. Change-Id: I2d5c5581cd0169aecb92ac7b610810988a8dcef4 Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-on: http://openocd.zylin.com/5032 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-09topic: Remapped Flash over ITCM region in STM32F7x scriptRocco Marco Guglielmi1-0/+4
This patch remaps the Flash over ITCM region as virtual to ensure that any breakpoint placed in this area will be automatically set as an hardware breakpoint. This patch is a fix to a regression introduced with changes #4429. Change-Id: I03d46d8537ef06b33a3d4a2328274667c6481969 Signed-off-by: Rocco Marco Guglielmi <roccomarco.guglielmi@gmail.com> Reviewed-on: http://openocd.zylin.com/5097 Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Tested-by: jenkins
2019-03-27smp: replace commands smp_on/smp_off with "smp [on|off]"Antonio Borneo1-2/+2
Seams over-engineered having two separate commands to turn SMP on/off. Plus it is missing the possibility to dump the current status of SMP and would be weird adding an additional command for it. Moreover, such commands are replicated in few targets so it would make sense centralizing them. - Deprecate the commands "smp_on" and "smp_off". - Add a new command "smp" that accepts optional parameters "[on|off]" and prints the SMP status when run without parameters. This replaces the two commands above. - Put the deprecated and the new command handlers in smp.c - Update the documentation, except for mips_m4k, since it is not available yet. - Promote the macro foreach_smp_target to global context and use it where possible. Change-Id: Ia72841c1a3bd6edd4db4cc809046322f498617e6 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4615 Tested-by: jenkins Reviewed-by: Graham Sanderson <graham.sanderson@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-03-27imx8m: add an m4 target to the imx8mAngus Ainslie1-0/+3
The imx8m also has a Cortex m4 so add a target for it. Change-Id: I2abf62b6232c547fe9b12507f459835b11c63a6d Signed-off-by: Angus Ainslie <angus@akkea.ca> Reviewed-on: http://openocd.zylin.com/4501 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-02-27flash: stm32f2/f4/f7: Add One-Time-Porgrammable (OTP) supportMoritz Fischer3-0/+4
The OTP is part of the flash memory. It has 512 (1024 for F7) bytes and is organized in 16 sectors with 32 (64 for F7) bytes each. The OTP is exposed as separate flash bank 1 and can be used with the usual flash commands. Writing the OTP can be done as follows: > stm32f2x otp 1 enable > flash write bank 1 foo.bin 0 > mdw 0x1fff7800 4 > verify_image foo.bin 0x1fff7800 > stm32f2x otp 1 disable Note: This patch is largely a rebase/cleanup of a patch from 2012 by Laurent Charpentier and he did most of the work. No new Clang-Analyzer warnings. Change-Id: I5e6371f6a7c7a9929c1d7907d6ba4724f9d20d97 Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-on: http://openocd.zylin.com/829 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-05flash/nor: flash driver and cfg for SAM E54, E53, E51 and D51Tomas Vanek2-0/+88
The new Microchip (former Atmel) series powered by Cortex-M4 looks very similar to older M0+ powered SAM D2x at the first sight. Unfortunately the new series differs a lot in important details. NVMCTRL has different register addresses, moved important bits and even changed binary command set. An universal driver for all SAM D/E would be very complicated. That's why a new driver was derived. Tested on Microchip SAM E54 Xplained Pro kit (board cfg included). Adjusted for the restructured dap support. Checked by valgrind and clang static analyzer. Change-Id: I26c67047a552076f4b207b9b89285a53d69b4ca4 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4272 Tested-by: jenkins Reviewed-by: Andres Vahter <andres.vahter@gmail.com>
2019-01-26tcl: Support for Analog Devices ADSP-SC58x / ADSP-SC584-EZBRDPeter Lawrence2-13/+51
The original script was broken by changes to the Cortex-A code. The recent introduction of the mem_ap target provided a new mechanism to allow the script to be fixed. This also adds an example board script for the ADSP-SC584-EZBRD. Change-Id: I36bc1ac6b6c036539f4175f1e65223ba10a35355 Signed-off-by: Peter Lawrence <majbthrd@gmail.com> Reviewed-on: http://openocd.zylin.com/4855 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-23Correct ZynqMP configuration to be appropriately namedJonathan McDowell2-8/+19
The xilinx_ultrascale.cfg target is actually the configuration for a ZynqMP, which is a combination of an UltraScale+ FPGA core and a quad core A53. Update the filename/comments to reflect this, and include the tap IDs for all known FPGA cores for this part. Change-Id: I70dfcc99861a482b83b6a795e83021d9cf1fe047 Signed-off-by: Jonathan McDowell <noodles@earth.li> Reviewed-on: http://openocd.zylin.com/4850 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-01-08icepick.cfg: add cancel reset bit to TAP register writesEdward Fewell1-3/+3
The Agama family of devices (CC26x2/CC13x2) required an additional bit to be set when adding the core's TAP into the scan chain. The cancel reset bit 0x10000 tells the ICEPick to take the bus out of reset so that the other bits will take effect. This bit is a NOP on other devices and ICEPicks, so the change shouldn't adversely affect other devices. Change-Id: I9245eef0936ea7eea28ae84ab5e8ce05fa63af40 Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/4789 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-02NOR: lpc2000 Add support for LPC84x devicesRod Boyce2-2/+17
These devices differ from LPC8xx devices in that they have a different IAP entry point, but everything else is the same. Using Tcl to pass different IAP entry point. no new Clang analyser warnings and no new build sanitizers issues. Change-Id: I2d654dd250f416e74262c0228cad8713a283402f Signed-off-by: Rod Boyce <developer@teamboyce.co.uk> Reviewed-on: http://openocd.zylin.com/4684 Reviewed-by: Jean-Christian de Rivaz <jcamdr70@gmail.com> Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-02flash: nor: ath79: remove base calculationOleksij Rempel4-4/+4
Currently it is impossible to flash ELF with correct offsets. The reason is a bogus offset calculation extracted from base. Since any other spi drivers do not care about base, do the same for ath79 as well. Change-Id: I9e46e01c9e7a709c2d07da9203c634f302603afd Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-on: http://openocd.zylin.com/4821 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-23Add LPC8Nxx and NHS3xx support.Jean-Christian de Rivaz2-0/+85
Change-Id: I0bdbca8dd9b234aca355230af7269463c9f70bd1 Signed-off-by: Jean-Christian de Rivaz <jcamdr70@gmail.com> Reviewed-on: http://openocd.zylin.com/4515 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-12fix cc32xx related changesJiri Kastner1-1/+3
original CC3200 launchpad works only with ti-icdi driver which stopped to work after merging to master commit d02de3a8a92091b9761ebaf44dff1a71f5b2edcb Change-Id: I247b5d99831fa744de1fdc5b8a7cffdf49fe953c Signed-off-by: Jiri Kastner <cz172638@gmail.com> Reviewed-on: http://openocd.zylin.com/4792 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-11flash/nor: update CC26xx/CC13xx supportEdward Fewell1-5/+34
Added fixes found in additional code reviews. Remove inappropriate use of bank_number field and updated documentation to reflect the change. Restored functionality to cc2538.cfg file because previous change removed the cc26xx.cfg file because the flash support changes made it obsolete. Rolled the previous cc26xx.cfg file into cc2538.cfg and updated it to work with other recent changes. Tested using a SmartRF06 Evaluation board with embedded XDS100v3 and external XDs110. Change-Id: Ia19d00cf8055c5c0f1acc53aa23fd06a80fd2ebc Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/4787 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-06stlink: add support for STLINK-V3Antonio Borneo1-2/+2
Extend the driver to include the minimal functionality to support the HLA model. Due to the small change in the name (ST-LINK/V2 => STLINK-V3), fix the existing names in the comments in udev rules. Change-Id: Ied33e38063a6da81d9bf249ed195444d7cdf4f03 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4717 Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06stlink: add usb pid for v2.1 without mass storage deviceAntonio Borneo1-1/+1
New version of ST-Link/V2.1 without mass storage device. From debug point of view, it is compatible with existing ST-Link/V2.1 It uses a new USB PID because the USB endpoints and interfaces are different from usual ST-Link/V2.1 Add the new PID in the driver, in the tcl interface script and in the udev configuration script. Change-Id: Id2e1b5a5d0347c5d951a86a9cdb76be52cfd4ea3 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4702 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06mem_helper: add mrh commandSteven Stallion1-0/+11
This patch adds support for reading halfword values from memory. This command compliments existing support for writing halfwords (mwh). Change-Id: I8ec628e65c05a7f00aa57e3af0f228eb8bd4d14e Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4781 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-11-26tcl/target, board: remove useless gdb-attach event definitionsTomas Vanek11-37/+0
Since commit bae76053dc515252dc5c8235b9a848e461080c66 gdb-attach event is defined as halt by default. Remove useless and in case of bcm281xx wrong definitions of the event. Change-Id: I8e69780a93722eb9392673303f54d502e71eceb6 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4763 Tested-by: jenkins Reviewed-by: Steven Stallion <sstallion@gmail.com>
2018-11-20tcl/target: ti_tms570.cfg restructure dap supportTomas Vanek1-5/+7
ti_tms570 was probably omitted in commit 2231da8ec4e7d7ae9b652f3dd1a7104f5a110f3f Change-Id: Idd4828fd5ea3641bda6c73c7f07a598c1e512ef6 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4762 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-11-18target/stm32f7x: clarify reset_config commentChristopher Head1-1/+4
The reset_config line in the config file does not actually set connect_assert_srst (the default is connect_deassert_srst), but it reads as if it does. Clarify that the target is compatible with connect_assert_srst, without suggesting that the file actually sets it to that value. Change-Id: I14e9445ab282d386b5d0055f6adf03d7c8878a8c Signed-off-by: Christopher Head <chead@zaber.com> Reviewed-on: http://openocd.zylin.com/4743 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
generated by cgit v1.1 at 2024-10-05 06:14:42 +0000