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| author | Marek Vasut <marek.vasut@gmail.com> | 2019-04-02 05:28:17 +0200 |
|---|---|---|
| committer | Matthias Welwarsky <matthias@welwarsky.de> | 2019-05-20 11:17:05 +0100 |
| commit | af952850b549124202903a24116d413fa145a769 (patch) | |
| tree | 45c03e4725bc181d239fa69e3a30089dd7e218b4 /tcl | |
| parent | 82e3a0e7cfa596e1b33e924036c82ab652b51619 (diff) | |
| download | riscv-openocd-af952850b549124202903a24116d413fa145a769.zip riscv-openocd-af952850b549124202903a24116d413fa145a769.tar.gz riscv-openocd-af952850b549124202903a24116d413fa145a769.tar.bz2 | |
tcl/target: Fix V3M/V3H SoC chipname
The V3M SoC is R8A77970 while the V3H SoC is R8A77980 . Update the
CHIPNAME and swap the SoCs to keep the list sorted.
Change-Id: I7e1777c0c7181e5e0beac98333f2047cb443d0df
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5140
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Diffstat (limited to 'tcl')
| -rw-r--r-- | tcl/target/renesas_rcar_gen3.cfg | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/tcl/target/renesas_rcar_gen3.cfg b/tcl/target/renesas_rcar_gen3.cfg index a6eef67..2c478b2 100644 --- a/tcl/target/renesas_rcar_gen3.cfg +++ b/tcl/target/renesas_rcar_gen3.cfg @@ -47,17 +47,17 @@ switch $_soc { set _num_cr7 1 set _boot_core CA57 } - V3H { + V3M { set _CHIPNAME r8a77970 set _num_ca57 0 - set _num_ca53 4 + set _num_ca53 2 set _num_cr7 1 set _boot_core CA53 } - V3M { + V3H { set _CHIPNAME r8a77980 set _num_ca57 0 - set _num_ca53 2 + set _num_ca53 4 set _num_cr7 1 set _boot_core CA53 } |