riscv-tools/riscv-openocd.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-05-17	target/riscv: Comment that data1 might change.	Tim Newsome	1	-0/+4
2023-05-16	Merge pull request #848 from riscv/removed-unused-func-set-frontend-running	Tim Newsome	2	-8/+0
2023-05-16	Merge pull request #850 from riscv/cleanup-in-target-c	Tim Newsome	1	-19/+17
2023-05-15	Merge pull request #844 from riscv/from_upstream	Tim Newsome	89	-19129/+2107
2023-05-15	Minor cleanup in target.c	Jan Matyas	1	-19/+17
2023-05-15	gdb_server: Removed unused function gdb_set_frontend_state_running	Jan Matyas	2	-8/+0
2023-05-10	target/riscv: Remove non-functional code in riscv_program_exec().	Tim Newsome	1	-4/+0
2023-05-04	Merge commit '228fe7300c7df7aa05ba2c0bc19edde6d0156401' into from_upstream	Tim Newsome	89	-19129/+2107
2023-05-04	Merge pull request #843 from riscv/hypervisor_translate	Tim Newsome	3	-58/+300
2023-04-28	target/riscv: Support VS-stage and G-stage address translation.hypervisor_translate	Tim Newsome	1	-5/+212
2023-04-28	Merge pull request #840 from aap-sc/aap-sc/resume_on_bp	Tim Newsome	1	-15/+22
2023-04-27	fix bp handling during resume	Parshintsev Anatoly	1	-15/+22
2023-04-25	target/riscv: Refactor to create riscv_effective_privilege_mode()	Tim Newsome	1	-7/+34
2023-04-25	target/riscv: Move some code from riscv_address_translate() to riscv_virt2phys()	Tim Newsome	1	-53/+55
2023-04-25	Comment pte_shift	Tim Newsome	1	-0/+1
2023-04-25	target/riscv: Add constants for vsatp, hgatp	Tim Newsome	2	-0/+5
2023-04-24	target/riscv: respect error code from dm013_select_target in select_prepped_h...	Parshintsev Anatoly	1	-2/+1
2023-04-11	Merge pull request #835 from en-sc/en-sc/fix-err-resume	Tim Newsome	1	-2/+2
2023-04-11	Merge pull request #833 from zqb-all/read_log128	Tim Newsome	1	-31/+40
2023-04-10	target/riscv: Handle error code in resume_prep	Evgeniy Naydanov	1	-2/+2
2023-04-10	target/riscv: support log memory access128 for read	Mark Zhuang	1	-31/+40
2023-04-07	Merge pull request #823 from panciyan/riscv	Tim Newsome	1	-1/+1
2023-04-06	Merge pull request #821 from en-sc/en-sc/fix-reset-mharts	Tim Newsome	1	-91/+62
2023-04-06	Merge pull request #830 from zqb-all/csr_32bit	Tim Newsome	1	-2/+12
2023-04-05	Merge branch 'riscv' into hypervisor	Tim Newsome	586	-11152/+12151
2023-04-05	target/riscv: simplify reset	Evgeniy Naydanov	1	-91/+62
2023-04-05	Merge pull request #816 from riscv/from_upstream	Tim Newsome	586	-11058/+12051
2023-04-04	Merge pull request #819 from zqb-all/fix_size_assert	Tim Newsome	3	-90/+96
2023-04-04	flash/nor/spi: Move mt25ql02 to match upstream.	Tim Newsome	1	-1/+1
2023-04-03	target/riscv: set some csr size to 32	Mark Zhuang	1	-2/+12
2023-03-29	Merge pull request #824 from riscv/aia	Tim Newsome	1	-3/+3
2023-03-29	target/riscv: Set hypervisor bits.	Tim Newsome	2	-3/+9
2023-03-25	target/riscv: [NFC] rename variables named read/write	Mark Zhuang	3	-74/+54
2023-03-25	target/riscv: support log memory access128	Mark Zhuang	1	-18/+44
2023-03-24	target/riscv: Don't ignore maskmax for icount.	Tim Newsome	1	-1/+1
2023-03-24	target/riscv: AIA regs, check for H not V	Tim Newsome	1	-3/+3
2023-03-23	target/riscv: leaf PTE check PTE_W missing	panciyan	1	-1/+1
2023-03-20	Merge pull request #815 from riscv/s_aia	Tim Newsome	5	-96/+250
2023-03-17	gdb_server: Keep working if gdb requests a non-existent reg	Tim Newsome	1	-1/+1
2023-03-16	Fix build.	Tim Newsome	3	-11/+10
2023-03-16	Merge commit '1293ddd65713d6551775b67169387622ada477c1' into from_upstream	Tim Newsome	586	-11048/+12042
2023-03-16	Merge pull request #800 from en-sc/en-sc/try-all-trigs-in-maybe-add-trig	Tim Newsome	1	-185/+245
2023-03-16	Expose S?aia CSRs if they're on the target.	Tim Newsome	4	-3/+88
2023-03-16	Update encoding.h.	Tim Newsome	1	-93/+162
2023-03-15	Merge pull request #812 from XuHangHub/riscv	Tim Newsome	1	-5/+5
2023-03-15	Try all triggers in maybe_add_trigger_t2 and _t6	Evgeniy Naydanov	1	-185/+245
2023-03-12	target/riscv: fix the bug of using S2 register in read_memory_progbuf	Hang Xu	1	-5/+5
2023-03-10	target/riscv: Remove unused address_in variable.	Tim Newsome	1	-2/+1
2023-03-08	Calculate the FreeRTOS type sizes and offsets more adaptively. (#806)	Chao Du	1	-6/+47
2023-03-06	helper: Add missing entry to jep106.inc.	Tim Newsome	1	-0/+1