riscv-tools/riscv-openocd.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
12 days	target/riscv: Fix calloc calls.	Tim Newsome	1	-2/+2
12 days	Merge pull request #1111 from en-sc/en-sc/ref-reg-manual-hwbp	Evgeniy Naydanov	1	-72/+115
12 days	Merge pull request #1125 from fk-sc/fk-sc/field-duplication	Evgeniy Naydanov	1	-1/+1
13 days	target/riscv: manage triggers available to OpenOCD for internal use	Evgeniy Naydanov	1	-72/+115
14 days	Merge pull request #1115 from en-sc/en-sc/fixup-bscan	Evgeniy Naydanov	1	-28/+27
14 days	target/riscv: remove duplicate progbufsize field	Farid Khaydari	1	-1/+1
2024-08-14	target/riscv: restrict BSCAN-related commands to before-`init`	Evgeniy Naydanov	1	-28/+27
2024-08-14	target/riscv: remove duplicate `dtmcontrol_scan()`	Evgeniy Naydanov	1	-13/+17
2024-07-16	target/riscv: single DMI accesses via batch	Evgeniy Naydanov	1	-4/+4
2024-07-04	target/riscv: deprecate `riscv set_reset_timeout_sec`	Evgeniy Naydanov	1	-5/+11
2024-07-02	target/riscv: separate register cache stuff into files	Evgeniy Naydanov	1	-1375/+59
2024-06-04	target/riscv: stop using register_get/set for 0.11 targets	Evgeniy Naydanov	1	-11/+77
2024-06-04	Merge pull request #1056 from aap-sc/aap-sc/no_hit_bit_status	Anatoly Parshintsev	1	-13/+88
2024-05-28	target/riscv: do not emit warnings when a non-existent CSR is hidden	Parshintsev Anatoly	1	-1/+1
2024-05-28	target/riscv: fix halt reason for targets that do not support hit bit on trig...	Parshintsev Anatoly	1	-13/+88
2024-05-17	Merge pull request #1029 from MrAlexei/add_decode_wp_rvc	Evgeniy Naydanov	1	-30/+467
2024-05-02	Merge pull request #1028 from en-sc/en-sc/busy-reset-batch	Evgeniy Naydanov	1	-4/+3
2024-04-30	Add functions to decode RVC load and store instructions	Aleksey Lotosh	1	-30/+467
2024-04-27	Merge pull request #1031 from aap-sc/aap-sc/hart_status_info_fixup	Evgeniy Naydanov	1	-8/+31
2024-04-27	Merge pull request #1055 from aap-sc/aap-sc/bp_unitialized	Evgeniy Naydanov	1	-3/+7
2024-04-26	target/riscv: reset delays during batch scans	Evgeniy Naydanov	1	-4/+3
2024-04-24	fix confusing status messages during resume	Parshintsev Anatoly	1	-8/+31
2024-04-24	target/riscv: use breakpoint_hw_set/watchpoint_set to properly initialize bp/...	Parshintsev Anatoly	1	-3/+7
2024-04-19	target/riscv: decode DMI scans in batch access	Evgeniy Naydanov	1	-1/+1
2024-04-05	target/riscv: read registers are not valid on a running target	Evgeniy Naydanov	1	-1/+2
2024-03-21	[NFC] target/riscv: refactor `init_registers()`	Evgeniy Naydanov	1	-377/+518
2024-03-07	Merge up to 07141132a7d787005c0829618a60b4a842be7847 from upstream	Evgeniy Naydanov	1	-1/+1
2024-02-27	Merge pull request #977 from kr-sc/kr-sc/improve-riscv-controls	Evgeniy Naydanov	1	-77/+65
2024-02-24	src/target/riscv: Help older compilers	Sevan Janiyan	1	-1/+1
2024-02-21	Merge pull request #1014 from riscv-collab/riscv-batch-cleanup	Evgeniy Naydanov	1	-8/+8
2024-02-13	target/riscv: Improve riscv controls that manage the set of available trigger...	Kirill Radkin	1	-77/+65
2024-02-12	Merge pull request #1011 from en-sc/en-sc/wa-halt-groups	Jan Matyas	1	-0/+6
2024-02-09	Merge pull request #1008 from en-sc/en-sc/from_upstream	Jan Matyas	1	-1/+1
2024-02-06	Fixes and cleanup in riscv batch and related functions	Jan Matyas	1	-8/+8
2024-02-02	target/riscv: set `state` and `debug_reason` in `riscv_halt_go_all_harts()`	Evgeniy Naydanov	1	-0/+6
2024-01-29	Merge up to 9659a9b5e28dc615dfb508d301fdd8fa426c191b from upstream	Evgeniy Naydanov	1	-1/+1
2024-01-28	target: get_gdb_arch() accepts target via const pointer	Evgeniy Naydanov	1	-1/+1
2024-01-26	Revert "break from long loops on shutdown request"	Evgeniy Naydanov	1	-6/+0
2024-01-25	Merge pull request #997 from en-sc/en-sc/priv-access	Jan Matyas	1	-9/+1
2024-01-24	target/riscv: report info about target during `poll`	Evgeniy Naydanov	1	-0/+8
2024-01-23	target/riscv: move read redirection for `priv` to `riscv-013.c`	Evgeniy Naydanov	1	-9/+1
2024-01-18	Merge pull request #992 from en-sc/en-sc/remove-hart-count	Jan Matyas	1	-10/+0
2024-01-18	Merge pull request #991 from en-sc/en-sc/dm-dmi-address-conversion	Jan Matyas	1	-108/+106
2024-01-16	target/riscv: fix addressing in `dm_read`/`dm_wirte`	Evgeniy Naydanov	1	-108/+106
2024-01-16	target/riscv: remove `riscv_hart_count()`	Evgeniy Naydanov	1	-10/+0
2024-01-09	break from long loops on shutdown request	Evgeniy Naydanov	1	-0/+6
2023-12-22	rename dbgbuf to progbuf	Parshintsev Anatoly	1	-13/+13
2023-12-22	introduce execution status for riscv_program	Parshintsev Anatoly	1	-2/+2
2023-11-17	Merge pull request #963 from kr-sc/kr-sc/no-free-triggers	Tim Newsome	1	-1/+1
2023-11-16	Merge pull request #958 from riscv/set_field_get_field	Tim Newsome	1	-4/+1