riscv-tools/riscv-openocd.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
4 days	Merge pull request #1142 from en-sc/en-sc/from_upstreamHEAD latest riscv	Evgeniy Naydanov	1	-2/+2
9 days	Merge up to 1173473f662bbdf6d1499654568256257eee6cdd from upstream	Evgeniy Naydanov	1	-2/+2
9 days	Fix riscv013_invalidate_cached_progbuf() off by one error	Tommy Murphy	1	-2/+1
12 days	Merge pull request #1134 from fk-sc/early-exit-support	Evgeniy Naydanov	1	-196/+326
2024-09-27	target/riscv: early exit support for memory access operations	Farid Khaydari	1	-196/+326
2024-09-23	target/riscv: move `riscv_log_dmi_scan`	Evgeniy Naydanov	1	-78/+0
2024-09-06	target/riscv: avoid unnecessary IR scans	Evgeniy Naydanov	1	-0/+3
2024-09-06	Merge pull request #1125 from fk-sc/fk-sc/field-duplication	Evgeniy Naydanov	1	-11/+24
2024-09-04	target/riscv: remove duplicate progbufsize field	Farid Khaydari	1	-11/+24
2024-09-03	Merge pull request #1109 from aap-sc/aap-sc/sbus_fixup	Anatoly Parshintsev	1	-4/+7
2024-08-20	Merge up to ac63cd00d792331914db0b6edd3f427c30eec3fa from upstream	Parshintsev Anatoly	1	-2/+2
2024-08-16	Merge pull request #1114 from en-sc/en-sc/dup-dtmcontrol	Evgeniy Naydanov	1	-35/+0
2024-08-15	target/riscv: sys bus v1 fix for sizes greater than 4	Parshintsev Anatoly	1	-4/+7
2024-08-14	target/riscv: remove duplicate `dtmcontrol_scan()`	Evgeniy Naydanov	1	-35/+0
2024-08-14	target/riscv: reg cache entry is initialized before access	Evgeniy Naydanov	1	-80/+19
2024-08-02	jtag: Use 'unsigned int' for 'scan_field.num_bits'	Marc Schink	1	-1/+1
2024-08-02	jtag: Use 'unsigned int' for 'abs_chain_position'	Marc Schink	1	-2/+2
2024-07-16	target/riscv: single DMI accesses via batch	Evgeniy Naydanov	1	-254/+39
2024-07-10	target/riscv: write SB address using batch	Evgeniy Naydanov	1	-38/+37
2024-07-09	Merge pull request #1096 from en-sc/en-sc/run-batch-busy	Evgeniy Naydanov	1	-3/+7
2024-07-09	Merge pull request #1083 from en-sc/en-sc/deprecate-reset-timeout	Evgeniy Naydanov	1	-56/+23
2024-07-09	Merge pull request #1081 from en-sc/en-sc/sb_read_v1	Evgeniy Naydanov	1	-62/+32
2024-07-04	target/riscv: deprecate `riscv set_reset_timeout_sec`	Evgeniy Naydanov	1	-56/+23
2024-07-04	Merge pull request #1082 from en-sc/en-sc/sbcs-read	Evgeniy Naydanov	1	-20/+8
2024-07-03	target/riscv: reset `dmi.busy` after batches	Evgeniy Naydanov	1	-3/+7
2024-07-03	target/riscv: use batch interface in `read_memory_bus_v1()`	Evgeniy Naydanov	1	-62/+32
2024-07-03	Merge pull request #1087 from en-sc/en-sc/delay-types	Evgeniy Naydanov	1	-89/+101
2024-07-03	Merge pull request #1084 from en-sc/en-sc/ref-reg-files	Evgeniy Naydanov	1	-59/+54
2024-07-02	target/riscv: simplify `sbcs` read in `write_memory_bus_v1()`	Evgeniy Naydanov	1	-20/+8
2024-07-02	target/riscv: separate register cache stuff into files	Evgeniy Naydanov	1	-59/+54
2024-07-01	target/riscv: replace `info->*_delay` with `riscv_scan_delays`	Evgeniy Naydanov	1	-89/+101
2024-06-14	target/riscv: select DMI IR on batch access.	Evgeniy Naydanov	1	-0/+2
2024-06-06	target/riscv: write registers using batch	Evgeniy Naydanov	1	-78/+180
2024-05-31	riscv-013: Remove unused typedef slot_tremove-slot_t-from-riscv-013	Jan Matyas	1	-6/+0
2024-05-28	Merge pull request #1033 from en-sc/en-sc/err-read-abs-arg	Evgeniy Naydanov	1	-45/+130
2024-05-23	target/riscv: read abstract args using batch	Evgeniy Naydanov	1	-45/+130
2024-05-18	Merge pull request #1061 from en-sc/en-sc/dm-reset	Evgeniy Naydanov	1	-41/+81
2024-05-15	target/riscv: only `dmactive` can be written if `dmactive` is low	Evgeniy Naydanov	1	-41/+81
2024-04-26	target/riscv: reset delays during batch scans	Evgeniy Naydanov	1	-20/+27
2024-04-19	target/riscv: decode DMI scans in batch access	Evgeniy Naydanov	1	-40/+38
2024-04-14	Merge pull request #1040 from rivos-eblot/dev/ebl/read_mem_dmibase	Evgeniy Naydanov	1	-1/+5
2024-04-11	target/riscv: check `abstractcs.busy`	Evgeniy Naydanov	1	-6/+73
2024-04-11	target/riscv: introduce `examine_dm()` function	Evgeniy Naydanov	1	-73/+131
2024-04-10	target/riscv: cache `abstractcs.busy` in `dm013_info_t`	Evgeniy Naydanov	1	-2/+36
2024-04-04	target/riscv: Add missing DM base offset to read_memory_bus_v1()	Emmanuel Blot	1	-1/+5
2024-02-21	Merge pull request #1014 from riscv-collab/riscv-batch-cleanup	Evgeniy Naydanov	1	-21/+21
2024-02-11	target/riscv: free dm and target_list structures	Tomas Vanek	1	-0/+25
2024-02-06	Fixes and cleanup in riscv batch and related functions	Jan Matyas	1	-21/+21
2024-02-05	Cosmetic cleanup of dm_*() calls in riscv-013.c	Jan Matyas	1	-10/+11
2024-01-26	Revert "break from long loops on shutdown request"	Evgeniy Naydanov	1	-6/+0