riscv-tools/riscv-openocd.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2024-05-31	riscv-013: Remove unused typedef slot_tremove-slot_t-from-riscv-013	Jan Matyas	1	-6/+0
2024-05-28	Merge pull request #1033 from en-sc/en-sc/err-read-abs-arg	Evgeniy Naydanov	1	-45/+130
2024-05-23	target/riscv: read abstract args using batch	Evgeniy Naydanov	1	-45/+130
2024-05-18	Merge pull request #1061 from en-sc/en-sc/dm-reset	Evgeniy Naydanov	1	-41/+81
2024-05-15	target/riscv: only `dmactive` can be written if `dmactive` is low	Evgeniy Naydanov	1	-41/+81
2024-04-26	target/riscv: reset delays during batch scans	Evgeniy Naydanov	1	-20/+27
2024-04-19	target/riscv: decode DMI scans in batch access	Evgeniy Naydanov	1	-40/+38
2024-04-14	Merge pull request #1040 from rivos-eblot/dev/ebl/read_mem_dmibase	Evgeniy Naydanov	1	-1/+5
2024-04-11	target/riscv: check `abstractcs.busy`	Evgeniy Naydanov	1	-6/+73
2024-04-11	target/riscv: introduce `examine_dm()` function	Evgeniy Naydanov	1	-73/+131
2024-04-10	target/riscv: cache `abstractcs.busy` in `dm013_info_t`	Evgeniy Naydanov	1	-2/+36
2024-04-04	target/riscv: Add missing DM base offset to read_memory_bus_v1()	Emmanuel Blot	1	-1/+5
2024-02-21	Merge pull request #1014 from riscv-collab/riscv-batch-cleanup	Evgeniy Naydanov	1	-21/+21
2024-02-11	target/riscv: free dm and target_list structures	Tomas Vanek	1	-0/+25
2024-02-06	Fixes and cleanup in riscv batch and related functions	Jan Matyas	1	-21/+21
2024-02-05	Cosmetic cleanup of dm_*() calls in riscv-013.c	Jan Matyas	1	-10/+11
2024-01-26	Revert "break from long loops on shutdown request"	Evgeniy Naydanov	1	-6/+0
2024-01-25	Merge pull request #997 from en-sc/en-sc/priv-access	Jan Matyas	1	-0/+13
2024-01-25	Merge pull request #995 from en-sc/en-sc/ctx-fix	Jan Matyas	1	-4/+8
2024-01-23	target/riscv: move read redirection for `priv` to `riscv-013.c`	Evgeniy Naydanov	1	-0/+13
2024-01-18	Merge pull request #992 from en-sc/en-sc/remove-hart-count	Jan Matyas	1	-10/+1
2024-01-18	Merge pull request #990 from en-sc/en-sc/dmi-defines	Jan Matyas	1	-6/+6
2024-01-18	Merge pull request #991 from en-sc/en-sc/dm-dmi-address-conversion	Jan Matyas	1	-2/+11
2024-01-16	target/riscv: cleanup `get_riscv_debug_reg_ctx()`	Evgeniy Naydanov	1	-4/+8
2024-01-16	target/riscv: fix addressing in `dm_read`/`dm_wirte`	Evgeniy Naydanov	1	-2/+11
2024-01-16	target/riscv: remove `riscv_hart_count()`	Evgeniy Naydanov	1	-10/+1
2024-01-10	[NFC] target/riscv: use defined constants in `dmi_*_t` enums	Evgeniy Naydanov	1	-6/+6
2024-01-09	break from long loops on shutdown request	Evgeniy Naydanov	1	-0/+6
2023-12-22	rename dbgbuf to progbuf	Parshintsev Anatoly	1	-20/+20
2023-12-22	introduce execution status for riscv_program	Parshintsev Anatoly	1	-75/+115
2023-12-15	Clean up clang static analyzer complaints.	Tim Newsome	1	-30/+25
2023-12-11	Merge pull request #959 from en-sc/en-sc/progbuf-mem-write	Tim Newsome	1	-146/+241
2023-12-07	Update riscv/debug_defines (to sync with riscv-debug-spec:40b9a05)	Kirill Radkin	1	-3/+3
2023-12-07	target/riscv: improve error handling in `write_memory_progbuf()`	Evgeniy Naydanov	1	-146/+241
2023-12-01	target/riscv: avoid using VLA in `log_debug_reg()`	Evgeniy Naydanov	1	-1/+6
2023-12-01	target/riscv: report helpfull location during register decode	Evgeniy Naydanov	1	-4/+6
2023-11-16	Merge pull request #958 from riscv/set_field_get_field	Tim Newsome	1	-12/+6
2023-11-16	Merge pull request #957 from riscv/sbbusyerror	Tim Newsome	1	-7/+37
2023-11-15	target/riscv: Handle sbbusyerror in read_memory_bus_v1	Tim Newsome	1	-7/+37
2023-11-15	target/riscv: Replace [sg]et_field macros with functions.	Tim Newsome	1	-12/+6
2023-11-15	target/riscv: replace `__PRETTY_FUNCTION__` with `__func__`	Evgeniy Naydanov	1	-4/+3
2023-11-15	target/riscv: dump_field() shouldn't always decode	Evgeniy Naydanov	1	-10/+14
2023-11-10	target/riscv: clarify usage of `coreid`	Evgeniy Naydanov	1	-4/+4
2023-11-03	Merge pull request #896 from AnastasiyaChernikova/ac-sc2	Tim Newsome	1	-12/+12
2023-11-02	target/riscv: Adding register tables to make register names consistent	Anastasiya Chernikova	1	-12/+12
2023-10-30	target/riscv: Prevent dump_field() reading uninitialized memory	Tim Newsome	1	-1/+6
2023-10-16	Merge pull request #929 from aap-sc/riscv	Tim Newsome	1	-11/+15
2023-10-07	target/riscv: use cacheable read/write function to handle DCSR	liangzhen	1	-34/+5
2023-10-06	do not assume DTM version unless dtmcontrol is read successfully	Parshintsev Anatoly	1	-11/+15
2023-10-05	Merge pull request #915 from riscv/dpc_print	Tim Newsome	1	-1/+0