aboutsummaryrefslogtreecommitdiff
path: root/src/target/armv4_5.c
AgeCommit message (Expand)AuthorFilesLines
2020-06-06target/cortex_a: fix memory leak of register cacheAntonio Borneo1-0/+21
2020-05-09coding style: remove useless break after a goto or returnAntonio Borneo1-3/+0
2020-03-12target/cortex_a: add hypervisor modeAntonio Borneo1-7/+54
2020-03-12target/armv4_5: remove unused macroAntonio Borneo1-3/+0
2020-03-12arm: Use different enum for core_type and core_modeAntonio Borneo1-9/+9
2020-03-12arm: fix reg num for Monitor modeAntonio Borneo1-1/+1
2020-03-10semihosting: reorganize semihosting commandsTarek BOCHKATI1-30/+2
2019-12-19target/armv4_5: use c99 array designator to init arm_core_regs[]Antonio Borneo1-42/+42
2019-05-14helper/command: change prototype of command_print/command_print_samelineAntonio Borneo1-12/+12
2019-04-07target/armv4_5: use coherent syntax in struct initializationAntonio Borneo1-4/+4
2019-03-06target/armv4_5: Use 'bool' data typeMarc Schink1-13/+13
2019-02-07target start_algorithm: Don't copy the IN mem_params fix uninitialised value.Jean-Christian de Rivaz1-0/+2
2019-02-07target algo: do not write reg_param if direction is PARAM_INTomas Vanek1-0/+3
2019-01-27command: initialize the command mode for every commandAntonio Borneo1-0/+1
2019-01-08target/arm: add support for multi-architecture gdbAntonio Borneo1-0/+14
2018-07-18Avoid null target->semihosting references.Liviu Ionescu1-3/+3
2018-06-04Rework/update ARM semihostingLiviu Ionescu1-120/+21
2018-04-10target, flash: prepare infrastructure for multi-block blank checkTomas Vanek1-5/+8
2018-03-10Support for Arm VFP v3 registers read/writeOmair Javaid1-1/+92
2017-10-22arm: semihosting: set command line argumentsAndreas Fritiofson1-0/+43
2017-02-10target: Add 64-bit target address supportDongxue Zhang1-8/+8
2016-12-08semihosting: support fileio operationSteven Stallion1-2/+45
2016-10-30flash/nor: Add erased_value to drivers and pass it to targetsAndreas Färber1-2/+8
2016-05-24Remove FSF address from GPL noticesMarc Schink1-3/+1
2016-05-22armv4_5: Integrate build of checksum codeAndreas Färber1-33/+8
2016-05-22armv4_5: Integrate build of erase check codeAndreas Färber1-14/+8
2016-05-22armv4_5: Improve arm_checksum_memory() error handlingAndreas Färber1-10/+7
2016-05-22armv4_5: Improve arm_blank_check_memory() error handlingAndreas Färber1-10/+5
2016-02-29armv4_5: support weirdo ARMv6 secure monitor modeLinus Walleij1-0/+7
2015-03-09armv7m: add FPU registers supportPaul Fertser1-1/+3
2015-01-30armv4_5: Continue the change from uint32_t to uint8_t[4] for regsAndreas Fritiofson1-2/+2
2014-01-23Add GDB remote target description support for ARM4Luca BRUNO1-52/+141
2013-08-07gdb_server: support gdb target descriptionHsiangkai Wang1-1/+2
2013-07-01armv4_5: prevent segfault when gdb connects to an underinitialised targetPaul Fertser1-1/+5
2013-06-05update files to correct FSF addressSpencer Oliver1-1/+1
2013-02-02armv7m: use generic arm::core_modeSpencer Oliver1-0/+15
2012-11-06ARM v4/v5 target files: mrc and mcr help information is incorrect.Karl Kurbjun1-2/+2
2012-05-14build: use generic name for arm_algorithm varsSpencer Oliver1-10/+10
2012-05-14build: add missing erase_check loader srcSpencer Oliver1-1/+3
2012-02-06build: cleanup src/target directorySpencer Oliver1-249/+233
2012-01-23cleanup: rename armv4_5 to arm for readabilitySpencer Oliver1-85/+90
2012-01-18cmd: add missing usage varsSpencer Oliver1-0/+2
2012-01-12target: fix missing semihosting return pathSpencer Oliver1-0/+1
2012-01-04Change return value on error.Mathias K1-3/+1
2012-01-04retire ERROR_INVALID_ARGUMENTS and replace with ERROR_COMMAND_SYNTAX_ERRORØyvind Harboe1-5/+5
2011-11-01target: fix null pointer exceptionØyvind Harboe1-2/+14
2011-06-04Fix "unused variable" warnings (errors) detected with GCC 4.7.0 - trivial fixesFreddie Chopin1-2/+0
2010-10-28src: add loader src descriptionSpencer Oliver1-0/+2
2010-08-11arm: add missing error reportingØyvind Harboe1-0/+9
2010-07-20armv4_5: add algorithms instruction breakpoint supportSpencer Oliver1-6/+16
generated by cgit v1.1 at 2024-11-16 14:07:59 +0000