1 files changed, 0 insertions, 87 deletions
diff --git a/tcl/target/at91samdXX.cfg b/tcl/target/at91samdXX.cfg
deleted file mode 100644
index 47b4f5f..0000000
--- a/tcl/target/at91samdXX.cfg
+++ /dev/null
@@ -1,87 +0,0 @@
-#
-# script for Atmel SAMD, SAMR, SAML or SAMC, a Cortex-M0 chip
-#
-
-#
-# samdXX devices only support SWD transports.
-#
-source [find target/swj-dp.tcl]
-
-if { [info exists CHIPNAME] } {
-   set _CHIPNAME $CHIPNAME
-} else {
-   set _CHIPNAME at91samd
-}
-
-if { [info exists ENDIAN] } {
-   set _ENDIAN $ENDIAN
-} else {
-   set _ENDIAN little
-}
-
-# Work-area is a space in RAM used for flash programming
-# By default use 2kB
-if { [info exists WORKAREASIZE] } {
-   set _WORKAREASIZE $WORKAREASIZE
-} else {
-   set _WORKAREASIZE 0x800
-}
-
-if { [info exists CPUTAPID] } {
-   set _CPUTAPID $CPUTAPID
-} else {
-   set _CPUTAPID 0x4ba00477
-}
-
-swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
-
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
-
-$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
-
-# SAMD DSU will hold the CPU in reset if TCK is low when RESET_N
-# deasserts (see datasheet Atmel-42181E–SAM-D21_Datasheet–02/2015, section 12.6.2)
-#
-# dsu_reset_deassert configures whether we want to run or halt out of reset,
-# then instruct the DSU to let us out of reset.
-$_TARGETNAME configure -event reset-deassert-post {
-        at91samd dsu_reset_deassert
-}
-
-# SRST (wired to RESET_N) resets debug circuitry
-# srst_pulls_trst is not configured here to avoid an error raised in reset halt
-reset_config srst_gates_jtag
-
-# Atmel's EDBG (on-board cmsis-dap adapter of Xplained kits) cannot
-# stop the MCU before it starts executing code if hardware RESETN
-# line is configured by command "reset_config srst_only"
-# Use "reset_config none" (default) before flash programming.
-
-# Do not use a reset button with other SWD adapter than Atmel's EDBG.
-# DSU usually locks MCU in reset state until you issue a reset command
-# in OpenOCD.
-
-# SAMD runs at SYSCLK = 1 MHz divided from RC oscillator after reset.
-# Other members of family usually use SYSCLK = 4 MHz after reset.
-# Datasheet does not specify SYSCLK to SWD clock ratio.
-# Usually used SYSCLK/6 is slow, testing shows that debugging can
-# work @ SYSCLK/2 but your mileage may vary.
-# This limit is most probably imposed by incorrectly handled SWD WAIT
-# on some SWD adapters.
-
-adapter_khz 400
-
-# Atmel's EDBG (on-board cmsis-dap adapter of Xplained kits) works
-# without problem at maximal clock speed. Atmel recommends
-# adapter speed less than 10 * CPU clock.
-# adapter_khz 5000
-
-if {![using_hla]} {
-   # if srst is not fitted use SYSRESETREQ to
-   # perform a soft reset
-   cortex_m reset_config sysresetreq
-}
-
-set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME at91samd 0x00000000 0 1 1 $_TARGETNAME