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-rw-r--r--tcl/bitsbytes.tcl2
-rw-r--r--tcl/chip/atmel/at91/aic.tcl2
-rw-r--r--tcl/chip/atmel/at91/at91_pio.cfg2
-rw-r--r--tcl/chip/atmel/at91/at91_pmc.cfg2
-rw-r--r--tcl/chip/atmel/at91/at91_rstc.cfg2
-rw-r--r--tcl/chip/atmel/at91/at91_wdt.cfg2
-rw-r--r--tcl/chip/atmel/at91/at91sam7x128.tcl2
-rw-r--r--tcl/chip/atmel/at91/at91sam7x256.tcl2
-rw-r--r--tcl/chip/atmel/at91/at91sam9261.cfg2
-rw-r--r--tcl/chip/atmel/at91/at91sam9261_matrix.cfg1
-rw-r--r--tcl/chip/atmel/at91/at91sam9263.cfg2
-rw-r--r--tcl/chip/atmel/at91/at91sam9263_matrix.cfg2
-rw-r--r--tcl/chip/atmel/at91/at91sam9_init.cfg2
-rw-r--r--tcl/chip/atmel/at91/at91sam9_sdramc.cfg1
-rw-r--r--tcl/chip/atmel/at91/at91sam9_smc.cfg2
-rw-r--r--tcl/chip/atmel/at91/hardware.cfg2
-rw-r--r--tcl/chip/atmel/at91/pmc.tcl1
-rw-r--r--tcl/chip/atmel/at91/rtt.tcl1
-rw-r--r--tcl/chip/atmel/at91/sam9_smc.cfg2
-rw-r--r--tcl/chip/atmel/at91/usarts.tcl2
-rw-r--r--tcl/chip/st/spear/quirk_no_srst.tcl2
-rw-r--r--tcl/chip/st/spear/spear3xx.tcl2
-rw-r--r--tcl/chip/st/spear/spear3xx_ddr.tcl2
-rw-r--r--tcl/chip/st/stm32/stm32.tcl2
-rw-r--r--tcl/chip/st/stm32/stm32_rcc.tcl1
-rw-r--r--tcl/chip/st/stm32/stm32_regs.tcl2
-rw-r--r--tcl/chip/ti/lm3s/lm3s.tcl2
-rw-r--r--tcl/chip/ti/lm3s/lm3s_regs.tcl2
-rw-r--r--tcl/cpld/altera-5m570z-cpld.cfg2
-rw-r--r--tcl/cpld/altera-epm240.cfg2
-rw-r--r--tcl/cpld/jtagspi.cfg2
-rw-r--r--tcl/cpld/lattice-lc4032ze.cfg2
-rw-r--r--tcl/cpld/xilinx-xc6s.cfg2
-rw-r--r--tcl/cpld/xilinx-xc7.cfg2
-rw-r--r--tcl/cpld/xilinx-xcf-p.cfg2
-rw-r--r--tcl/cpld/xilinx-xcf-s.cfg2
-rw-r--r--tcl/cpld/xilinx-xcr3256.cfg2
-rw-r--r--tcl/cpld/xilinx-xcu.cfg2
-rw-r--r--tcl/cpu/arm/arm7tdmi.tcl2
-rw-r--r--tcl/cpu/arm/arm920.tcl2
-rw-r--r--tcl/cpu/arm/arm946.tcl2
-rw-r--r--tcl/cpu/arm/arm966.tcl2
-rw-r--r--tcl/cpu/arm/cortex_m3.tcl2
-rw-r--r--tcl/fpga/altera-10m50.cfg2
-rw-r--r--tcl/fpga/altera-ep3c10.cfg2
-rw-r--r--tcl/fpga/xilinx-dna.cfg2
-rw-r--r--tcl/fpga/xilinx-xadc.cfg2
-rw-r--r--tcl/mem_helper.tcl2
-rw-r--r--tcl/memory.tcl2
-rw-r--r--tcl/mmr_helpers.tcl1
-rw-r--r--tcl/test/selftest.cfg1
-rw-r--r--tcl/test/syntax1.cfg2
-rw-r--r--tcl/tools/firmware-recovery.tcl2
-rw-r--r--tcl/tools/memtest.tcl2
54 files changed, 101 insertions, 0 deletions
diff --git a/tcl/bitsbytes.tcl b/tcl/bitsbytes.tcl
index 756c725..03d758e 100644
--- a/tcl/bitsbytes.tcl
+++ b/tcl/bitsbytes.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#----------------------------------------
# Purpose - Create some $BIT variables
# Create $K and $M variables
diff --git a/tcl/chip/atmel/at91/aic.tcl b/tcl/chip/atmel/at91/aic.tcl
index 8b8a48f..6657b60 100644
--- a/tcl/chip/atmel/at91/aic.tcl
+++ b/tcl/chip/atmel/at91/aic.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set AIC_SMR [expr {$AT91C_BASE_AIC + 0x00000000} ]
global AIC_SMR
set AIC_SVR [expr {$AT91C_BASE_AIC + 0x00000080} ]
diff --git a/tcl/chip/atmel/at91/at91_pio.cfg b/tcl/chip/atmel/at91/at91_pio.cfg
index 2373c19..10a1d48 100644
--- a/tcl/chip/atmel/at91/at91_pio.cfg
+++ b/tcl/chip/atmel/at91/at91_pio.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set PIO_PER 0x00 ;# Enable Register
set PIO_PDR 0x04 ;# Disable Register
set PIO_PSR 0x08 ;# Status Register
diff --git a/tcl/chip/atmel/at91/at91_pmc.cfg b/tcl/chip/atmel/at91/at91_pmc.cfg
index dd554ce..a75cecd 100644
--- a/tcl/chip/atmel/at91/at91_pmc.cfg
+++ b/tcl/chip/atmel/at91/at91_pmc.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set AT91_PMC_SCER [expr {$AT91_PMC + 0x00}] ;# System Clock Enable Register
set AT91_PMC_SCDR [expr {$AT91_PMC + 0x04}] ;# System Clock Disable Register
diff --git a/tcl/chip/atmel/at91/at91_rstc.cfg b/tcl/chip/atmel/at91/at91_rstc.cfg
index 6673fe6..fd17438 100644
--- a/tcl/chip/atmel/at91/at91_rstc.cfg
+++ b/tcl/chip/atmel/at91/at91_rstc.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set AT91_RSTC_CR [expr {$AT91_RSTC + 0x00}] ;# Reset Controller Control Register
set AT91_RSTC_PROCRST [expr {1 << 0}] ;# Processor Reset
set AT91_RSTC_PERRST [expr {1 << 2}] ;# Peripheral Reset
diff --git a/tcl/chip/atmel/at91/at91_wdt.cfg b/tcl/chip/atmel/at91/at91_wdt.cfg
index 9b4e817..8bba62e 100644
--- a/tcl/chip/atmel/at91/at91_wdt.cfg
+++ b/tcl/chip/atmel/at91/at91_wdt.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set AT91_WDT_CR [expr {$AT91_WDT + 0x00}] ;# Watchdog Control Register
set AT91_WDT_WDRSTT [expr {1 << 0}] ;# Restart
set AT91_WDT_KEY [expr {0xa5 << 24}] ;# KEY Password
diff --git a/tcl/chip/atmel/at91/at91sam7x128.tcl b/tcl/chip/atmel/at91/at91sam7x128.tcl
index ce33cf0..8f46827 100644
--- a/tcl/chip/atmel/at91/at91sam7x128.tcl
+++ b/tcl/chip/atmel/at91/at91sam7x128.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find bitsbytes.tcl]
source [find cpu/arm/arm7tdmi.tcl]
source [find memory.tcl]
diff --git a/tcl/chip/atmel/at91/at91sam7x256.tcl b/tcl/chip/atmel/at91/at91sam7x256.tcl
index dc4918a..49d5244 100644
--- a/tcl/chip/atmel/at91/at91sam7x256.tcl
+++ b/tcl/chip/atmel/at91/at91sam7x256.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find bitsbytes.tcl]
source [find cpu/arm/arm7tdmi.tcl]
source [find memory.tcl]
diff --git a/tcl/chip/atmel/at91/at91sam9261.cfg b/tcl/chip/atmel/at91/at91sam9261.cfg
index 61b0c0b..51e7101 100644
--- a/tcl/chip/atmel/at91/at91sam9261.cfg
+++ b/tcl/chip/atmel/at91/at91sam9261.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Peripheral identifiers/interrupts.
#
diff --git a/tcl/chip/atmel/at91/at91sam9261_matrix.cfg b/tcl/chip/atmel/at91/at91sam9261_matrix.cfg
index 238e658..c3656bd 100644
--- a/tcl/chip/atmel/at91/at91sam9261_matrix.cfg
+++ b/tcl/chip/atmel/at91/at91sam9261_matrix.cfg
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
set AT91_MATRIX_MCFG [expr {$AT91_MATRIX + 0x00}] ;# Master Configuration Register #
set AT91_MATRIX_RCB0 [expr {1 << 0}] ;# Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master)
diff --git a/tcl/chip/atmel/at91/at91sam9263.cfg b/tcl/chip/atmel/at91/at91sam9263.cfg
index 8e22eb2..600c548 100644
--- a/tcl/chip/atmel/at91/at91sam9263.cfg
+++ b/tcl/chip/atmel/at91/at91sam9263.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#
# Peripheral identifiers/interrupts.
#
diff --git a/tcl/chip/atmel/at91/at91sam9263_matrix.cfg b/tcl/chip/atmel/at91/at91sam9263_matrix.cfg
index b4a07d3..20a3107 100644
--- a/tcl/chip/atmel/at91/at91sam9263_matrix.cfg
+++ b/tcl/chip/atmel/at91/at91sam9263_matrix.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set AT91_MATRIX_MCFG0 [expr {$AT91_MATRIX + 0x00}] ;# Master Configuration Register 0
set AT91_MATRIX_MCFG1 [expr {$AT91_MATRIX + 0x04}] ;# Master Configuration Register 1
set AT91_MATRIX_MCFG2 [expr {$AT91_MATRIX + 0x08}] ;# Master Configuration Register 2
diff --git a/tcl/chip/atmel/at91/at91sam9_init.cfg b/tcl/chip/atmel/at91/at91sam9_init.cfg
index 27611eb..a64d6ea 100644
--- a/tcl/chip/atmel/at91/at91sam9_init.cfg
+++ b/tcl/chip/atmel/at91/at91sam9_init.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
uplevel #0 [list source [find chip/atmel/at91/at91sam9_sdramc.cfg]]
uplevel #0 [list source [find chip/atmel/at91/at91_pmc.cfg]]
uplevel #0 [list source [find chip/atmel/at91/at91_pio.cfg]]
diff --git a/tcl/chip/atmel/at91/at91sam9_sdramc.cfg b/tcl/chip/atmel/at91/at91sam9_sdramc.cfg
index 7b09369..658b6c3 100644
--- a/tcl/chip/atmel/at91/at91sam9_sdramc.cfg
+++ b/tcl/chip/atmel/at91/at91sam9_sdramc.cfg
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
# SDRAM Controller (SDRAMC) registers
set AT91_SDRAMC_MR [expr {$AT91_SDRAMC + 0x00}] ;# SDRAM Controller Mode Register
diff --git a/tcl/chip/atmel/at91/at91sam9_smc.cfg b/tcl/chip/atmel/at91/at91sam9_smc.cfg
index 3a76d14..c096c4a 100644
--- a/tcl/chip/atmel/at91/at91sam9_smc.cfg
+++ b/tcl/chip/atmel/at91/at91sam9_smc.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set AT91_SMC_READMODE [expr {1 << 0}] ;# Read Mode
set AT91_SMC_WRITEMODE [expr {1 << 1}] ;# Write Mode
set AT91_SMC_EXNWMODE [expr {3 << 4}] ;# NWAIT Mode
diff --git a/tcl/chip/atmel/at91/hardware.cfg b/tcl/chip/atmel/at91/hardware.cfg
index a25eab9..069d4b7 100644
--- a/tcl/chip/atmel/at91/hardware.cfg
+++ b/tcl/chip/atmel/at91/hardware.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# External Memory Map
set AT91_CHIPSELECT_0 0x10000000
set AT91_CHIPSELECT_1 0x20000000
diff --git a/tcl/chip/atmel/at91/pmc.tcl b/tcl/chip/atmel/at91/pmc.tcl
index 7cb1d09..0f997ca 100644
--- a/tcl/chip/atmel/at91/pmc.tcl
+++ b/tcl/chip/atmel/at91/pmc.tcl
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
if [info exists AT91C_MAINOSC_FREQ] {
# user set this... let it be.
diff --git a/tcl/chip/atmel/at91/rtt.tcl b/tcl/chip/atmel/at91/rtt.tcl
index d49ce71..1ef8373 100644
--- a/tcl/chip/atmel/at91/rtt.tcl
+++ b/tcl/chip/atmel/at91/rtt.tcl
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
set RTTC_RTMR [expr {$AT91C_BASE_RTTC + 0x00}]
set RTTC_RTAR [expr {$AT91C_BASE_RTTC + 0x04}]
diff --git a/tcl/chip/atmel/at91/sam9_smc.cfg b/tcl/chip/atmel/at91/sam9_smc.cfg
index 0628d4d..87880c7 100644
--- a/tcl/chip/atmel/at91/sam9_smc.cfg
+++ b/tcl/chip/atmel/at91/sam9_smc.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Setup register
#
# ncs_read_setup
diff --git a/tcl/chip/atmel/at91/usarts.tcl b/tcl/chip/atmel/at91/usarts.tcl
index 253b7fb..62a651b 100644
--- a/tcl/chip/atmel/at91/usarts.tcl
+++ b/tcl/chip/atmel/at91/usarts.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# the DBGU and USARTs are 'almost' indentical'
set DBGU_CR [expr {$AT91C_BASE_DBGU + 0x00000000}]
set DBGU_MR [expr {$AT91C_BASE_DBGU + 0x00000004}]
diff --git a/tcl/chip/st/spear/quirk_no_srst.tcl b/tcl/chip/st/spear/quirk_no_srst.tcl
index 551df06..e8640f4 100644
--- a/tcl/chip/st/spear/quirk_no_srst.tcl
+++ b/tcl/chip/st/spear/quirk_no_srst.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Quirks to bypass missing SRST on JTAG connector
# EVALSPEAr310 Rev. 2.0
# http://www.st.com/spear
diff --git a/tcl/chip/st/spear/spear3xx.tcl b/tcl/chip/st/spear/spear3xx.tcl
index 86f2a1d..474ebe3 100644
--- a/tcl/chip/st/spear/spear3xx.tcl
+++ b/tcl/chip/st/spear/spear3xx.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Generic init scripts for all ST SPEAr3xx family
# http://www.st.com/spear
#
diff --git a/tcl/chip/st/spear/spear3xx_ddr.tcl b/tcl/chip/st/spear/spear3xx_ddr.tcl
index 22fe06e..5992567 100644
--- a/tcl/chip/st/spear/spear3xx_ddr.tcl
+++ b/tcl/chip/st/spear/spear3xx_ddr.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Init scripts to configure DDR controller of SPEAr3xx
# http://www.st.com/spear
# Original values taken from XLoader source code
diff --git a/tcl/chip/st/stm32/stm32.tcl b/tcl/chip/st/stm32/stm32.tcl
index 94b1935..3826a57 100644
--- a/tcl/chip/st/stm32/stm32.tcl
+++ b/tcl/chip/st/stm32/stm32.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find bitsbytes.tcl]
source [find cpu/arm/cortex_m3.tcl]
source [find memory.tcl]
diff --git a/tcl/chip/st/stm32/stm32_rcc.tcl b/tcl/chip/st/stm32/stm32_rcc.tcl
index fa652a2..afa4cbf 100644
--- a/tcl/chip/st/stm32/stm32_rcc.tcl
+++ b/tcl/chip/st/stm32/stm32_rcc.tcl
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
set RCC_CR [expr {$RCC_BASE + 0x00}]
set RCC_CFGR [expr {$RCC_BASE + 0x04}]
diff --git a/tcl/chip/st/stm32/stm32_regs.tcl b/tcl/chip/st/stm32/stm32_regs.tcl
index 6ae2f63..07ff1aa 100644
--- a/tcl/chip/st/stm32/stm32_regs.tcl
+++ b/tcl/chip/st/stm32/stm32_regs.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# /* Peripheral and SRAM base address in the alias region */
set PERIPH_BB_BASE 0x42000000
set SRAM_BB_BASE 0x22000000
diff --git a/tcl/chip/ti/lm3s/lm3s.tcl b/tcl/chip/ti/lm3s/lm3s.tcl
index 42da8c6..324aad0 100644
--- a/tcl/chip/ti/lm3s/lm3s.tcl
+++ b/tcl/chip/ti/lm3s/lm3s.tcl
@@ -1 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
source [find chip/ti/lm3s/lm3s_regs.tcl]
diff --git a/tcl/chip/ti/lm3s/lm3s_regs.tcl b/tcl/chip/ti/lm3s/lm3s_regs.tcl
index cb20812..1e86e29 100644
--- a/tcl/chip/ti/lm3s/lm3s_regs.tcl
+++ b/tcl/chip/ti/lm3s/lm3s_regs.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#*****************************************************************************
#
# The following are defines for the System Control register addresses.
diff --git a/tcl/cpld/altera-5m570z-cpld.cfg b/tcl/cpld/altera-5m570z-cpld.cfg
index 22a422c..5dbd0de 100644
--- a/tcl/cpld/altera-5m570z-cpld.cfg
+++ b/tcl/cpld/altera-5m570z-cpld.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Altera MAXV 5M24OZ/5M570Z CPLD
# see MAX V Device Handbook
# Table 6-3: 32-Bit MAX V Device IDCODE
diff --git a/tcl/cpld/altera-epm240.cfg b/tcl/cpld/altera-epm240.cfg
index ece02bb..39c409b 100644
--- a/tcl/cpld/altera-epm240.cfg
+++ b/tcl/cpld/altera-epm240.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Altera MAXII EPM240T100C CPLD
if { [info exists CHIPNAME] } {
diff --git a/tcl/cpld/jtagspi.cfg b/tcl/cpld/jtagspi.cfg
index e720c39..7071e5e 100644
--- a/tcl/cpld/jtagspi.cfg
+++ b/tcl/cpld/jtagspi.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set _USER1 0x02
if { [info exists JTAGSPI_IR] } {
diff --git a/tcl/cpld/lattice-lc4032ze.cfg b/tcl/cpld/lattice-lc4032ze.cfg
index d4a85eb..479180f 100644
--- a/tcl/cpld/lattice-lc4032ze.cfg
+++ b/tcl/cpld/lattice-lc4032ze.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Lattice ispMACH 4000ZE family, device LC4032ZE
# just configure a tap
jtag newtap LC4032ZE tap -irlen 8 -expected-id 0x01806043
diff --git a/tcl/cpld/xilinx-xc6s.cfg b/tcl/cpld/xilinx-xc6s.cfg
index 9ce7ad4..82b87fb 100644
--- a/tcl/cpld/xilinx-xc6s.cfg
+++ b/tcl/cpld/xilinx-xc6s.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# xilinx spartan6
# http://www.xilinx.com/support/documentation/user_guides/ug380.pdf
diff --git a/tcl/cpld/xilinx-xc7.cfg b/tcl/cpld/xilinx-xc7.cfg
index 4c0502c..22e0aea 100644
--- a/tcl/cpld/xilinx-xc7.cfg
+++ b/tcl/cpld/xilinx-xc7.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# xilinx series 7 (artix, kintex, virtex)
# http://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
diff --git a/tcl/cpld/xilinx-xcf-p.cfg b/tcl/cpld/xilinx-xcf-p.cfg
index 8e0a26c..7b6d384 100644
--- a/tcl/cpld/xilinx-xcf-p.cfg
+++ b/tcl/cpld/xilinx-xcf-p.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
diff --git a/tcl/cpld/xilinx-xcf-s.cfg b/tcl/cpld/xilinx-xcf-s.cfg
index a3c79a3..417ecff 100644
--- a/tcl/cpld/xilinx-xcf-s.cfg
+++ b/tcl/cpld/xilinx-xcf-s.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
diff --git a/tcl/cpld/xilinx-xcr3256.cfg b/tcl/cpld/xilinx-xcr3256.cfg
index e5611f1..4668e54 100644
--- a/tcl/cpld/xilinx-xcr3256.cfg
+++ b/tcl/cpld/xilinx-xcr3256.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
#xilinx coolrunner xcr3256
#simple device - just configure a tap
jtag newtap xcr tap -irlen 5 -ircapture 0x01 -irmask 0x1f -expected-id 0x0494c093
diff --git a/tcl/cpld/xilinx-xcu.cfg b/tcl/cpld/xilinx-xcu.cfg
index 3270597..57a59f5 100644
--- a/tcl/cpld/xilinx-xcu.cfg
+++ b/tcl/cpld/xilinx-xcu.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Xilinx Ultrascale (Kintex, Virtex, Zynq)
# https://www.xilinx.com/support/documentation/user_guides/ug570-ultrascale-configuration.pdf
diff --git a/tcl/cpu/arm/arm7tdmi.tcl b/tcl/cpu/arm/arm7tdmi.tcl
index a1d4a1f..e407a23 100644
--- a/tcl/cpu/arm/arm7tdmi.tcl
+++ b/tcl/cpu/arm/arm7tdmi.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set CPU_TYPE arm
set CPU_NAME arm7tdmi
set CPU_ARCH armv4t
diff --git a/tcl/cpu/arm/arm920.tcl b/tcl/cpu/arm/arm920.tcl
index c01f602..1c5a8ad 100644
--- a/tcl/cpu/arm/arm920.tcl
+++ b/tcl/cpu/arm/arm920.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set CPU_TYPE arm
set CPU_NAME arm920
set CPU_ARCH armv4t
diff --git a/tcl/cpu/arm/arm946.tcl b/tcl/cpu/arm/arm946.tcl
index a6110a5..602d4d7 100644
--- a/tcl/cpu/arm/arm946.tcl
+++ b/tcl/cpu/arm/arm946.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set CPU_TYPE arm
set CPU_NAME arm946
set CPU_ARCH armv5te
diff --git a/tcl/cpu/arm/arm966.tcl b/tcl/cpu/arm/arm966.tcl
index 1fffbc0..0e64312 100644
--- a/tcl/cpu/arm/arm966.tcl
+++ b/tcl/cpu/arm/arm966.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set CPU_TYPE arm
set CPU_NAME arm966
set CPU_ARCH armv5te
diff --git a/tcl/cpu/arm/cortex_m3.tcl b/tcl/cpu/arm/cortex_m3.tcl
index c995026..0791664 100644
--- a/tcl/cpu/arm/cortex_m3.tcl
+++ b/tcl/cpu/arm/cortex_m3.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
set CPU_TYPE arm
set CPU_NAME cortex_m3
set CPU_ARCH armv7
diff --git a/tcl/fpga/altera-10m50.cfg b/tcl/fpga/altera-10m50.cfg
index d5af710..1937cb4 100644
--- a/tcl/fpga/altera-10m50.cfg
+++ b/tcl/fpga/altera-10m50.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# see MAX 10 FPGA Device Architecture
# Table 3-1: IDCODE Information for MAX 10 Devices
# Intel MAX 10M02 0x31810dd
diff --git a/tcl/fpga/altera-ep3c10.cfg b/tcl/fpga/altera-ep3c10.cfg
index 6e8962a..7c231f9 100644
--- a/tcl/fpga/altera-ep3c10.cfg
+++ b/tcl/fpga/altera-ep3c10.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Altera Cyclone III EP3C10
# see Cyclone III Device Handbook, Volume 1;
# Table 14–5. 32-Bit Cyclone III Device IDCODE
diff --git a/tcl/fpga/xilinx-dna.cfg b/tcl/fpga/xilinx-dna.cfg
index a805673..56f8c14 100644
--- a/tcl/fpga/xilinx-dna.cfg
+++ b/tcl/fpga/xilinx-dna.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
proc xilinx_dna_addr {chip} {
array set addrs {
Spartan6 0x30
diff --git a/tcl/fpga/xilinx-xadc.cfg b/tcl/fpga/xilinx-xadc.cfg
index 250879e..fdaf3a9 100644
--- a/tcl/fpga/xilinx-xadc.cfg
+++ b/tcl/fpga/xilinx-xadc.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Xilinx XADC support for 7 Series FPGAs
#
# The 7 Series FPGAs contain an on-chip 12 bit ADC that can probe die
diff --git a/tcl/mem_helper.tcl b/tcl/mem_helper.tcl
index 1c86011..0229d54 100644
--- a/tcl/mem_helper.tcl
+++ b/tcl/mem_helper.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Helper for common memory read/modify/write procedures
# mrw: "memory read word", returns value of $reg
diff --git a/tcl/memory.tcl b/tcl/memory.tcl
index ac27345..b111749 100644
--- a/tcl/memory.tcl
+++ b/tcl/memory.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# MEMORY
#
# All Memory regions have two components.
diff --git a/tcl/mmr_helpers.tcl b/tcl/mmr_helpers.tcl
index 61c58e7..5c37fcf 100644
--- a/tcl/mmr_helpers.tcl
+++ b/tcl/mmr_helpers.tcl
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
proc proc_exists { NAME } {
set n [info commands $NAME]
diff --git a/tcl/test/selftest.cfg b/tcl/test/selftest.cfg
index 0331b48..10efb0c 100644
--- a/tcl/test/selftest.cfg
+++ b/tcl/test/selftest.cfg
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
add_help_text selftest "run selftest using working ram <tmpfile> <address> <size>"
diff --git a/tcl/test/syntax1.cfg b/tcl/test/syntax1.cfg
index 2e66188..7735ee9 100644
--- a/tcl/test/syntax1.cfg
+++ b/tcl/test/syntax1.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
adapter srst delay 200
jtag_ntrst_delay 200
diff --git a/tcl/tools/firmware-recovery.tcl b/tcl/tools/firmware-recovery.tcl
index 9d7e0fc..6a328cd 100644
--- a/tcl/tools/firmware-recovery.tcl
+++ b/tcl/tools/firmware-recovery.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
echo "\n\nFirmware recovery helpers"
echo "Use -c firmware_help to get help\n"
diff --git a/tcl/tools/memtest.tcl b/tcl/tools/memtest.tcl
index c7fa591..f70f950 100644
--- a/tcl/tools/memtest.tcl
+++ b/tcl/tools/memtest.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
# Algorithms by Michael Barr, released into public domain
# Ported to OpenOCD by Shane Volpe, additional fixes by Paul Fertser