blob: c3656bd41d44cd4a0d37232511ab7058a6b7d976 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
|
# SPDX-License-Identifier: GPL-2.0-or-later
set AT91_MATRIX_MCFG [expr {$AT91_MATRIX + 0x00}] ;# Master Configuration Register #
set AT91_MATRIX_RCB0 [expr {1 << 0}] ;# Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master)
set AT91_MATRIX_RCB1 [expr {1 << 1}] ;# Remap Command for AHB Master 1 (ARM926EJ-S Data Master)
set AT91_MATRIX_SCFG0 [expr {$AT91_MATRIX + 0x04}] ;# Slave Configuration Register 0
set AT91_MATRIX_SCFG1 [expr {$AT91_MATRIX + 0x08}] ;# Slave Configuration Register 1
set AT91_MATRIX_SCFG2 [expr {$AT91_MATRIX + 0x0C}] ;# Slave Configuration Register 2
set AT91_MATRIX_SCFG3 [expr {$AT91_MATRIX + 0x10}] ;# Slave Configuration Register 3
set AT91_MATRIX_SCFG4 [expr {$AT91_MATRIX + 0x14}] ;# Slave Configuration Register 4
set AT91_MATRIX_SLOT_CYCLE [expr {0xff << 0}] ;# Maximum Number of Allowed Cycles for a Burst
set AT91_MATRIX_DEFMSTR_TYPE [expr {3 << 16}] ;# Default Master Type
set AT91_MATRIX_DEFMSTR_TYPE_NONE [expr {0 << 16}]
set AT91_MATRIX_DEFMSTR_TYPE_LAST [expr {1 << 16}]
set AT91_MATRIX_DEFMSTR_TYPE_FIXED [expr {2 << 16}]
set AT91_MATRIX_FIXED_DEFMSTR [expr {7 << 18}] ;# Fixed Index of Default Master
set AT91_MATRIX_TCR [expr {$AT91_MATRIX + 0x24}] ;# TCM Configuration Register
set AT91_MATRIX_ITCM_SIZE [expr {0xf << 0}] ;# Size of ITCM enabled memory block
set AT91_MATRIX_ITCM_0 [expr {0 << 0}]
set AT91_MATRIX_ITCM_16 [expr {5 << 0}]
set AT91_MATRIX_ITCM_32 [expr {6 << 0}]
set AT91_MATRIX_ITCM_64 [expr {7 << 0}]
set AT91_MATRIX_DTCM_SIZE [expr {0xf << 4}] ;# Size of DTCM enabled memory block
set AT91_MATRIX_DTCM_0 [expr {0 << 4}]
set AT91_MATRIX_DTCM_16 [expr {5 << 4}]
set AT91_MATRIX_DTCM_32 [expr {6 << 4}]
set AT91_MATRIX_DTCM_64 [expr {7 << 4}]
set AT91_MATRIX_EBICSA [expr {$AT91_MATRIX + 0x30}] ;# EBI Chip Select Assignment Register
set AT91_MATRIX_CS1A [expr {1 << 1}] ;# Chip Select 1 Assignment
set AT91_MATRIX_CS1A_SMC [expr {0 << 1}]
set AT91_MATRIX_CS1A_SDRAMC [expr {1 << 1}]
set AT91_MATRIX_CS3A [expr {1 << 3}] ;# Chip Select 3 Assignment
set AT91_MATRIX_CS3A_SMC [expr {0 << 3}]
set AT91_MATRIX_CS3A_SMC_SMARTMEDIA [expr {1 << 3}]
set AT91_MATRIX_CS4A [expr {1 << 4}] ;# Chip Select 4 Assignment
set AT91_MATRIX_CS4A_SMC [expr {0 << 4}]
set AT91_MATRIX_CS4A_SMC_CF1 [expr {1 << 4}]
set AT91_MATRIX_CS5A [expr {1 << 5}] ;# Chip Select 5 Assignment
set AT91_MATRIX_CS5A_SMC [expr {0 << 5}]
set AT91_MATRIX_CS5A_SMC_CF2 [expr {1 << 5}]
set AT91_MATRIX_DBPUC [expr {1 << 8}] ;# Data Bus Pull-up Configuration
set AT91_MATRIX_USBPUCR [expr {$AT91_MATRIX + 0x34}] ;# USB Pad Pull-Up Control Register
set AT91_MATRIX_USBPUCR_PUON [expr {1 << 30}] ;# USB Device PAD Pull-up Enable
|