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author | Tarek BOCHKATI <tarek.bouchkati@gmail.com> | 2020-03-25 16:33:30 +0100 |
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committer | Tomas Vanek <vanekt@fbl.cz> | 2020-11-15 21:55:20 +0000 |
commit | 3d736e0488bc498358e3d49d7ce728b17955c8fe (patch) | |
tree | 94881dbfbc971328d7455c65200ec9e1ce9367b0 /tcl/board | |
parent | dc43ecce5a7ee5722ea851707ad3acd08a42b5aa (diff) | |
download | riscv-openocd-3d736e0488bc498358e3d49d7ce728b17955c8fe.zip riscv-openocd-3d736e0488bc498358e3d49d7ce728b17955c8fe.tar.gz riscv-openocd-3d736e0488bc498358e3d49d7ce728b17955c8fe.tar.bz2 |
flash/stm32l4x: STM32L55/L56xx basic support (non-secure mode)
STM32L5 have 512 Kbytes of Flash memory with dual bank architecture.
STM32L5 flash is quite similar to L4 flash, mainly register names
and offsets and some bits are changed.
NON-SECURE flash is located at 0x8000000 like L4 devices, so no
big change is needed (secure flash will be subject of another change).
Note: flash driver name is set stm32l5x, in order to extend the commands
with specific L5 commands (to manage TZEN for example ...)
Note: this works only when TZEN=0
Change-Id: Ie758abb4aa19a3f29eeb0702d7dcb43992e4c639
Signed-off-by: Michael Jung <mijung@gmx.net>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5510
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Diffstat (limited to 'tcl/board')
-rw-r--r-- | tcl/board/st_nucleo_l5.cfg | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/tcl/board/st_nucleo_l5.cfg b/tcl/board/st_nucleo_l5.cfg new file mode 100644 index 0000000..6450f08 --- /dev/null +++ b/tcl/board/st_nucleo_l5.cfg @@ -0,0 +1,13 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# This is for STM32L5 Nucleo Dev Boards. +# http://www.st.com/en/evaluation-tools/stm32-mcu-nucleo.html + +source [find interface/stlink-dap.cfg] + +transport select dapdirect_swd + +source [find target/stm32l5x.cfg] + +# use hardware reset +reset_config srst_only srst_nogate |