aboutsummaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorBenedikt-Alexander Mokroß <mokross@gessler.de>2020-08-24 10:59:27 +0200
committerTomas Vanek <vanekt@fbl.cz>2020-10-14 05:40:27 +0100
commitfc7edd57ac6678d1113bc09265798de3fdc68347 (patch)
treedcb265a6f50c221efb12e98dab52c1d4b6d54651 /src
parent3ffa14b043225b9766132b1979db7ddb8d91ba5e (diff)
downloadriscv-openocd-fc7edd57ac6678d1113bc09265798de3fdc68347.zip
riscv-openocd-fc7edd57ac6678d1113bc09265798de3fdc68347.tar.gz
riscv-openocd-fc7edd57ac6678d1113bc09265798de3fdc68347.tar.bz2
flash/nor/at91sam4: ATSAMG55x19 Rev.B
Add support for ATSAMG55x19 Rev.B. Both chips have nearly the same cidr, however, Rev.B has an incremented version. Change-Id: I5939c41fa5d54c4d3bfb850964974b878f709d13 Signed-off-by: Benedikt-Alexander Mokroß <mokross@gessler.de> Reviewed-on: http://openocd.zylin.com/5825 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
Diffstat (limited to 'src')
-rw-r--r--src/flash/nor/at91sam4.c72
1 files changed, 70 insertions, 2 deletions
diff --git a/src/flash/nor/at91sam4.c b/src/flash/nor/at91sam4.c
index 1c61064..86abf70 100644
--- a/src/flash/nor/at91sam4.c
+++ b/src/flash/nor/at91sam4.c
@@ -1330,7 +1330,7 @@ static const struct sam4_chip_details all_sam4_details[] = {
}
},
- /* atsamg55g19 */
+ /* atsamg55g19 Rev.A */
{
.chipid_cidr = 0x24470ae0,
.name = "atsamg55g19",
@@ -1364,7 +1364,41 @@ static const struct sam4_chip_details all_sam4_details[] = {
}
},
- /* atsamg55j19 */
+ /* atsamg55g19 Rev.B */
+ {
+ .chipid_cidr = 0x24470ae1,
+ .name = "atsamg55g19b",
+ .total_flash_size = 512 * 1024,
+ .total_sram_size = 160 * 1024,
+ .n_gpnvms = 2,
+ .n_banks = 1,
+
+ {
+/* .bank[0] = */
+ {
+ .probed = false,
+ .pChip = NULL,
+ .pBank = NULL,
+ .bank_number = 0,
+ .base_address = FLASH_BANK_BASE_S,
+ .controller_address = 0x400e0a00,
+ .flash_wait_states = 5,
+ .present = true,
+ .size_bytes = 512 * 1024,
+ .nsectors = 64,
+ .sector_size = 8192,
+ .page_size = 512,
+ },
+/* .bank[1] = */
+ {
+ .present = false,
+ .probed = false,
+ .bank_number = 1,
+ },
+ }
+ },
+
+ /* atsamg55j19 Rev.A */
{
.chipid_cidr = 0x24570ae0,
.name = "atsamg55j19",
@@ -1398,6 +1432,40 @@ static const struct sam4_chip_details all_sam4_details[] = {
}
},
+ /* atsamg55j19 Rev.B */
+ {
+ .chipid_cidr = 0x24570ae1,
+ .name = "atsamg55j19b",
+ .total_flash_size = 512 * 1024,
+ .total_sram_size = 160 * 1024,
+ .n_gpnvms = 2,
+ .n_banks = 1,
+
+ {
+/* .bank[0] = */
+ {
+ .probed = false,
+ .pChip = NULL,
+ .pBank = NULL,
+ .bank_number = 0,
+ .base_address = FLASH_BANK_BASE_S,
+ .controller_address = 0x400e0a00,
+ .flash_wait_states = 5,
+ .present = true,
+ .size_bytes = 512 * 1024,
+ .nsectors = 64,
+ .sector_size = 8192,
+ .page_size = 512,
+ },
+/* .bank[1] = */
+ {
+ .present = false,
+ .probed = false,
+ .bank_number = 1,
+ },
+ }
+ },
+
/* terminate */
{
.chipid_cidr = 0,