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| author | Jiri Kastner <cz172638@gmail.com> | 2018-08-01 15:17:43 +0200 |
|---|---|---|
| committer | Oleksij Rempel <linux@rempel-privat.de> | 2020-01-20 06:28:49 +0000 |
| commit | f98099507f509db9a18c70365490a6b9f67108db (patch) | |
| tree | 499341478399fa0a9a5e6bb0acfec8cf1f391e56 /src | |
| parent | ff6d0704ecd66343e3dab2059c89fa392e2214be (diff) | |
| download | riscv-openocd-f98099507f509db9a18c70365490a6b9f67108db.zip riscv-openocd-f98099507f509db9a18c70365490a6b9f67108db.tar.gz riscv-openocd-f98099507f509db9a18c70365490a6b9f67108db.tar.bz2 | |
mips_ejtag: there is no DCR.MIPS64 bit
available revisions (2.60, 3.10, 5.06 and 6.10) of
MD00047 (EJTAG specification), have only in IMPCODE
MIPS32/MIPS64 bit/flag.
Change-Id: If9191b6ced760c59bb7551bb041cd72b0a060bb1
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/4628
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
Diffstat (limited to 'src')
| -rw-r--r-- | src/target/mips_ejtag.c | 2 | ||||
| -rw-r--r-- | src/target/mips_ejtag.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c index 0b8122e..6d35e21 100644 --- a/src/target/mips_ejtag.c +++ b/src/target/mips_ejtag.c @@ -349,7 +349,7 @@ static void ejtag_main_print_imp(struct mips_ejtag *ejtag_info) EJTAG_IMP_HAS(EJTAG_IMP_ASID6) ? " ASID_6" : "", EJTAG_IMP_HAS(EJTAG_IMP_MIPS16) ? " MIPS16" : "", EJTAG_IMP_HAS(EJTAG_IMP_NODMA) ? " noDMA" : " DMA", - EJTAG_IMP_HAS(EJTAG_DCR_MIPS64) ? " MIPS64" : " MIPS32"); + EJTAG_IMP_HAS(EJTAG_IMP_MIPS64) ? " MIPS64" : " MIPS32"); switch (ejtag_info->ejtag_version) { case EJTAG_VERSION_20: diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h index cfba0ab..ace3d28 100644 --- a/src/target/mips_ejtag.h +++ b/src/target/mips_ejtag.h @@ -130,7 +130,7 @@ /* v2.0 - 1:4 Number of Break Channels. */ #define EJTAG_V20_IMP_BCHANNELS_MASK 0xf #define EJTAG_V20_IMP_BCHANNELS_SHIFT 1 -#define EJTAG_DCR_MIPS64 (1 << 0) +#define EJTAG_IMP_MIPS64 (1 << 0) /* Debug Control Register DCR */ #define EJTAG_DCR 0xFF300000 |