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authorFlorian Fainelli <f.fainelli@gmail.com>2021-07-09 11:04:27 -0700
committerAntonio Borneo <borneo.antonio@gmail.com>2021-07-24 10:39:12 +0100
commite2ef1c9090ad01e78aa537418ca3f543e4c1282b (patch)
tree7f379d2b45a84c98ab0838a88970671c606c7b85 /src
parentc0c7d6fe8b04f521a7262303083ef5eb6ebaf4e5 (diff)
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arm_adi_v5: Provide Brahma-B53 identifiers
The Broadcom Brahma-B53 CPUs contains a number of custom ROM table entries for its PMU, Debug unit, and a couple of ROM tables. Change-Id: I1f21f07ed296579c374f24e781325789bf4ebf51 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-on: http://openocd.zylin.com/6368 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/target/arm_adi_v5.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index dc6f63d..16fe69a 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -1201,6 +1201,10 @@ static const struct {
{ 0x0c1, 0x1ed, "XMC1000 ROM", "(ROM Table)" },
{ 0x0E5, 0x000, "SHARC+/Blackfin+", "", },
{ 0x0F0, 0x440, "Qualcomm QDSS Component v1", "(Qualcomm Designed CoreSight Component v1)", },
+ { 0x1bf, 0x100, "Brahma-B53 Debug", "(Debug Unit)", },
+ { 0x1bf, 0x9d3, "Brahma-B53 PMU", "(Performance Monitor Unit)", },
+ { 0x1bf, 0x4a1, "Brahma-B53 ROM", "(ROM Table)", },
+ { 0x1bf, 0x721, "Brahma-B53 ROM", "(ROM Table)", },
{ 0x3eb, 0x181, "Tegra 186 ROM", "(ROM Table)", },
{ 0x3eb, 0x202, "Denver ETM", "(Denver Embedded Trace)", },
{ 0x3eb, 0x211, "Tegra 210 ROM", "(ROM Table)", },