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| author | Tomas Vanek <vanekt@fbl.cz> | 2020-04-13 14:49:46 +0200 |
|---|---|---|
| committer | Tomas Vanek <vanekt@fbl.cz> | 2020-10-28 10:51:48 +0000 |
| commit | a5bf98f846eba410cdfc678b5b223052a68439c1 (patch) | |
| tree | 4c49c9bd66c64ac6ac75c31384c6089abbf880e7 /src | |
| parent | 491636c8b8328a54bef41b68771c2965dd468e05 (diff) | |
| download | riscv-openocd-a5bf98f846eba410cdfc678b5b223052a68439c1.zip riscv-openocd-a5bf98f846eba410cdfc678b5b223052a68439c1.tar.gz riscv-openocd-a5bf98f846eba410cdfc678b5b223052a68439c1.tar.bz2 | |
flash/nor/nrf5: improve handling of nRF52 flash errors
nRF52 devices indicate a flash error by emitting hard fault
exception (unlike nRF51 series).
Change error message when NVMC READY read fails. A hard fault
from flash erase/write operation is detected here.
Check exit point of the flash write algo to ensure a failed
write is recognised.
Change-Id: I637eda268a6bf45f7f41bcb9dcd82db8f5cb41b4
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5587
Tested-by: jenkins
Diffstat (limited to 'src')
| -rw-r--r-- | src/flash/nor/nrf5.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/flash/nor/nrf5.c b/src/flash/nor/nrf5.c index f56f32e..02c1448 100644 --- a/src/flash/nor/nrf5.c +++ b/src/flash/nor/nrf5.c @@ -328,7 +328,7 @@ static int nrf5_wait_for_nvmc(struct nrf5_info *chip) do { res = target_read_u32(chip->target, NRF5_NVMC_READY, &ready); if (res != ERROR_OK) { - LOG_ERROR("Couldn't read NVMC_READY register"); + LOG_ERROR("Error waiting NVMC_READY: generic flash write/erase error (check protection etc...)"); return res; } @@ -1012,7 +1012,7 @@ static int nrf5_ll_flash_write(struct nrf5_info *chip, uint32_t address, const u 0, NULL, ARRAY_SIZE(reg_params), reg_params, source->address, source->size, - write_algorithm->address, 0, + write_algorithm->address, write_algorithm->address + sizeof(nrf5_flash_write_code) - 2, &armv7m_info); target_free_working_area(target, source); |