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| author | Mathias K <kesmtp@freenet.de> | 2012-03-15 14:58:32 +0100 |
|---|---|---|
| committer | Spencer Oliver <spen@spen-soft.co.uk> | 2012-03-30 16:08:32 +0000 |
| commit | 861df4574d351731b8651ff5cd71a6d51e491d3f (patch) | |
| tree | 1f12f14de6425777df78e23a4bfb9f2738f2e2ac /src | |
| parent | 8cb4fc142067771fedb203e18262e3eb25253ed3 (diff) | |
| download | riscv-openocd-861df4574d351731b8651ff5cd71a6d51e491d3f.zip riscv-openocd-861df4574d351731b8651ff5cd71a6d51e491d3f.tar.gz riscv-openocd-861df4574d351731b8651ff5cd71a6d51e491d3f.tar.bz2 | |
armv7m: detect floating point feature
This patch add fp feature detection on cortex-m4.
Change-Id: I99e9d1bf5534630a22b8ad9c878165683db2d0ba
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/524
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'src')
| -rw-r--r-- | src/target/armv7m.c | 1 | ||||
| -rw-r--r-- | src/target/armv7m.h | 7 | ||||
| -rw-r--r-- | src/target/cortex_m.c | 20 |
3 files changed, 27 insertions, 1 deletions
diff --git a/src/target/armv7m.c b/src/target/armv7m.c index 258653e..780e81b 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -578,6 +578,7 @@ int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m) struct arm *arm = &armv7m->arm; armv7m->common_magic = ARMV7M_COMMON_MAGIC; + armv7m->fp_feature = FP_NONE; arm->core_type = ARM_MODE_THREAD; arm->arch_info = armv7m; diff --git a/src/target/armv7m.h b/src/target/armv7m.h index 35bd62a..827a879 100644 --- a/src/target/armv7m.h +++ b/src/target/armv7m.h @@ -97,6 +97,11 @@ enum { ARMV7M_LAST_REG, }; +enum { + FP_NONE = 0, + FPv4_SP, +}; + #define ARMV7M_COMMON_MAGIC 0x2A452A45 struct armv7m_common { @@ -108,6 +113,8 @@ struct armv7m_common { int exception_number; struct adiv5_dap dap; + int fp_feature; + uint32_t demcr; /* Direct processor core register read and writes */ diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index 76e197c..488899c 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -1756,13 +1756,20 @@ fail1: */ } +#define MVFR0 0xe000ef40 +#define MVFR1 0xe000ef44 + +#define MVFR0_DEFAULT_M4 0x10110021 +#define MVFR1_DEFAULT_M4 0x11000011 + int cortex_m3_examine(struct target *target) { int retval; - uint32_t cpuid, fpcr; + uint32_t cpuid, fpcr, mvfr0, mvfr1; int i; struct cortex_m3_common *cortex_m3 = target_to_cm3(target); struct adiv5_dap *swjdp = &cortex_m3->armv7m.dap; + struct armv7m_common *armv7m = target_to_armv7m(target); retval = ahbap_debugport_init(swjdp); if (retval != ERROR_OK) @@ -1783,6 +1790,17 @@ int cortex_m3_examine(struct target *target) i, (uint8_t)((cpuid >> 20) & 0xf), (uint8_t)((cpuid >> 0) & 0xf)); LOG_DEBUG("cpuid: 0x%8.8" PRIx32 "", cpuid); + /* test for floating point feature on cortex-m4 */ + if (i == 4) { + target_read_u32(target, MVFR0, &mvfr0); + target_read_u32(target, MVFR1, &mvfr1); + + if ((mvfr0 == MVFR0_DEFAULT_M4) && (mvfr1 == MVFR1_DEFAULT_M4)) { + LOG_DEBUG("Cortex-M%d floating point feature FPv4_SP found", i); + armv7m->fp_feature = FPv4_SP; + } + } + /* NOTE: FPB and DWT are both optional. */ /* Setup FPB */ |