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author | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-07 14:55:08 -0800 |
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committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-07 14:57:44 -0800 |
commit | 81aec6be045792f3ed6a2d8fdbf1f534993b5c14 (patch) | |
tree | 71e39734fd3f68f3606331c8f3f569ce32e2162f /src | |
parent | bbb754aa395be74ceac0c01640fb33c0fae52c20 (diff) | |
download | riscv-openocd-81aec6be045792f3ed6a2d8fdbf1f534993b5c14.zip riscv-openocd-81aec6be045792f3ed6a2d8fdbf1f534993b5c14.tar.gz riscv-openocd-81aec6be045792f3ed6a2d8fdbf1f534993b5c14.tar.bz2 |
ARM: list number of HW breakpoints/watchpoints
When starting up, say how many hardware breakpoints and watchpoints
are available on various targets.
This makes it easier to tell GDB how many of those resources exist.
Its remote protocol currently has no way to ask OpenOCD for that
information, so it must configured by hand (or not at all).
Update the docs to mention this; remove obsolete "don't do this" info.
Presentation of GDB setup information is still a mess, but at least
it calls out the three components that need setup.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src')
-rw-r--r-- | src/target/cortex_m3.c | 6 | ||||
-rw-r--r-- | src/target/embeddedice.c | 3 | ||||
-rw-r--r-- | src/target/xscale.c | 3 |
3 files changed, 12 insertions, 0 deletions
diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c index 558b211..bdd3233 100644 --- a/src/target/cortex_m3.c +++ b/src/target/cortex_m3.c @@ -1608,6 +1608,12 @@ static int cortex_m3_examine(struct target *target) /* Setup DWT */ cortex_m3_dwt_setup(cortex_m3, target); + + /* These hardware breakpoints only work for code in flash! */ + LOG_INFO("%s: hardware has %d breakpoints, %d watchpoints", + target_name(target), + cortex_m3->fp_num_code, + cortex_m3->dwt_num_comp); } return ERROR_OK; diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c index cca9cc0..eb04bd1 100644 --- a/src/target/embeddedice.c +++ b/src/target/embeddedice.c @@ -289,6 +289,9 @@ embeddedice_build_reg_cache(struct target *target, struct arm7_9_common *arm7_9) buf_get_u32(reg_list[EICE_COMMS_CTRL].value, 0, 32)); } + LOG_INFO("%s: hardware has 2 breakpoints or watchpoints", + target_name(target)); + return reg_cache; } diff --git a/src/target/xscale.c b/src/target/xscale.c index ac697da..9ed9eea 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -2970,6 +2970,9 @@ static int xscale_init_arch_info(struct target *target, xscale->dbr0_used = 0; xscale->dbr1_used = 0; + LOG_INFO("%s: hardware has 2 breakpoints and 2 watchpoints", + target_name(target)); + xscale->arm_bkpt = ARMV5_BKPT(0x0); xscale->thumb_bkpt = ARMV5_T_BKPT(0x0) & 0xffff; |