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author | Tarek BOCHKATI <tarek.bouchkati@gmail.com> | 2021-02-14 13:21:36 +0100 |
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committer | Antonio Borneo <borneo.antonio@gmail.com> | 2021-06-13 19:59:04 +0100 |
commit | 708284a1accfa01c7a14ea7d7cd588000776d6b7 (patch) | |
tree | 718d6ee04a5500faae2aae7481aa3066c4a6b068 /src | |
parent | 21e1ebdc8e548f0db5fe5e2f90fb1cfc49cc53b0 (diff) | |
download | riscv-openocd-708284a1accfa01c7a14ea7d7cd588000776d6b7.zip riscv-openocd-708284a1accfa01c7a14ea7d7cd588000776d6b7.tar.gz riscv-openocd-708284a1accfa01c7a14ea7d7cd588000776d6b7.tar.bz2 |
arm_dpm: do not read/write non-existent registers
Change-Id: I6a991899bb178ee0c6b41870a45d0a9439d9dc1e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/6063
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Diffstat (limited to 'src')
-rw-r--r-- | src/target/arm_dpm.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c index 058f0df..d1f5748 100644 --- a/src/target/arm_dpm.c +++ b/src/target/arm_dpm.c @@ -514,7 +514,7 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp) continue; if (arm->cpsr == cache->reg_list + i) continue; - if (!cache->reg_list[i].dirty) + if (!cache->reg_list[i].exist || !cache->reg_list[i].dirty) continue; r = cache->reg_list[i].arch_info; @@ -763,7 +763,7 @@ static int arm_dpm_full_context(struct target *target) for (unsigned i = 0; i < cache->num_regs; i++) { struct arm_reg *r; - if (cache->reg_list[i].valid) + if (!cache->reg_list[i].exist || cache->reg_list[i].valid) continue; r = cache->reg_list[i].arch_info; |