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author | Tim Newsome <tim@sifive.com> | 2021-10-05 10:03:19 -0700 |
---|---|---|
committer | Antonio Borneo <borneo.antonio@gmail.com> | 2021-11-20 14:39:52 +0000 |
commit | 6441fe8d9d29d7720e1272e1a5b166535116d172 (patch) | |
tree | 08022360177df697ee884fcc676bf006c0b2fbf6 /src | |
parent | f8bd2566a936c7909f2b602bba3c83cc833afaea (diff) | |
download | riscv-openocd-6441fe8d9d29d7720e1272e1a5b166535116d172.zip riscv-openocd-6441fe8d9d29d7720e1272e1a5b166535116d172.tar.gz riscv-openocd-6441fe8d9d29d7720e1272e1a5b166535116d172.tar.bz2 |
riscv: Clear type 6 triggers on connecting.
I missed this when I first add mcontrol6 support.
https://github.com/riscv/riscv-openocd/pull/648
Change-Id: I1a2706c7ea3a6757ed5083091cd2c764a8b0267c
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6684
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/target/riscv/riscv.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 084939e..407b7e2 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -3569,6 +3569,10 @@ int riscv_enumerate_triggers(struct target *target) if (tdata1 & MCONTROL_DMODE(riscv_xlen(target))) riscv_set_register(target, GDB_REGNO_TDATA1, 0); break; + case 6: + if (tdata1 & MCONTROL_DMODE(riscv_xlen(target))) + riscv_set_register(target, GDB_REGNO_TDATA1, 0); + break; } } |