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author | Antonio Borneo <borneo.antonio@gmail.com> | 2019-02-13 17:15:58 +0100 |
---|---|---|
committer | Tomas Vanek <vanekt@fbl.cz> | 2019-06-06 16:33:30 +0100 |
commit | 02cd1e39cc710a6a6592486238c15f7b42c7d21c (patch) | |
tree | 39fab9f0baec4827cdc38ec740a9381bddc9a632 /src | |
parent | e5177a5ad455ac0c353fd6bb48ff288912168428 (diff) | |
download | riscv-openocd-02cd1e39cc710a6a6592486238c15f7b42c7d21c.zip riscv-openocd-02cd1e39cc710a6a6592486238c15f7b42c7d21c.tar.gz riscv-openocd-02cd1e39cc710a6a6592486238c15f7b42c7d21c.tar.bz2 |
target/cortex_m: remove dependency from jtag queue
Since the first commit 09883194f867 that introduced cortex_m, the
code has a delay of 50ms after srst has been asserted.
The specific delay is implemented through the JTAG_SLEEP command
sent in the jtag queue.
To remove the dependency from the jtag queue, replace the delay
with a transport independent function.
In case of jtag transport, this change keeps the same behaviour
only if the jtag queue has been flushed before the delay. This
does not happen if the call to dap_dp_init(), few lines above,
fails while calling a dap_queue_dp_{read,write}(); in this case
the jtag queue will be flushed later, after the delay, while in
the original code the delay would follow the flushing of the
commands already queued. Anyway, this different behavior would
only happen in case of DAP already not responsive so anticipating
the delay in such error condition is not supposed to add further
problems.
Change-Id: If15978246764e4266b10e707d86c03e5ed907de7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4912
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Diffstat (limited to 'src')
-rw-r--r-- | src/target/cortex_m.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index ce3ab09..e296039 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -1198,7 +1198,7 @@ static int cortex_m_assert_reset(struct target *target) } target->state = TARGET_RESET; - jtag_add_sleep(50000); + jtag_sleep(50000); register_cache_invalidate(cortex_m->armv7m.arm.core_cache); |