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author | Florian Fainelli <f.fainelli@gmail.com> | 2021-07-06 20:19:28 -0700 |
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committer | Antonio Borneo <borneo.antonio@gmail.com> | 2022-05-14 08:48:10 +0000 |
commit | 1fd2a6c7f5cba7c5ec655e355e63dd31804bb900 (patch) | |
tree | a5b00f68ae1a6e54a8886d63c28497db1198cae9 /src/target | |
parent | fed329feec985b74961f5209c824ba3ca618eea7 (diff) | |
download | riscv-openocd-1fd2a6c7f5cba7c5ec655e355e63dd31804bb900.zip riscv-openocd-1fd2a6c7f5cba7c5ec655e355e63dd31804bb900.tar.gz riscv-openocd-1fd2a6c7f5cba7c5ec655e355e63dd31804bb900.tar.bz2 |
arm_adi_v5: add support for display Class 0x9 ROM tables
ADI v5.1 and v6.0 permit the definition of CoreSight components (class 9
ROM entries).
dap_rom_display() is refactored a bit such that we always end up with
attempting to parse the ROM contents using the appropriate upper limit
for class 1 and 9 ROM types.
Change-Id: I4ba497b3807f1f11f06186eb6e61959ea3540c59
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6359
Tested-by: jenkins
Diffstat (limited to 'src/target')
-rw-r--r-- | src/target/arm_adi_v5.c | 69 |
1 files changed, 47 insertions, 22 deletions
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index d886a76..99673f2 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -928,8 +928,8 @@ static const struct { }; #define DEVARCH_ID_MASK (ARM_CS_C9_DEVARCH_ARCHITECT_MASK | ARM_CS_C9_DEVARCH_ARCHID_MASK) +#define DEVARCH_ROM_C_0X9 ARCH_ID(ARM_ID, 0x0AF7) -__attribute__((unused)) static const char *class0x9_devarch_description(uint32_t devarch) { if (!(devarch & ARM_CS_C9_DEVARCH_PRESENT)) @@ -1449,6 +1449,7 @@ static int dap_devtype_display(struct command_invocation *cmd, uint32_t devtype) static int dap_rom_display(struct command_invocation *cmd, struct adiv5_ap *ap, target_addr_t dbgbase, int depth) { + unsigned int rom_num_entries; int retval; uint64_t pid; uint32_t cid; @@ -1513,27 +1514,7 @@ static int dap_rom_display(struct command_invocation *cmd, else command_print(cmd, "\t\tMEMTYPE system memory not present: dedicated debug bus"); - /* Read ROM table entries from base address until we get 0x00000000 or reach the reserved area */ - for (uint16_t entry_offset = 0; entry_offset < 0xF00; entry_offset += 4) { - uint32_t romentry; - retval = mem_ap_read_atomic_u32(ap, base_addr | entry_offset, &romentry); - if (retval != ERROR_OK) - return retval; - command_print(cmd, "\t%sROMTABLE[0x%x] = 0x%" PRIx32 "", - tabs, entry_offset, romentry); - if (romentry & ARM_CS_ROMENTRY_PRESENT) { - /* Recurse. "romentry" is signed */ - retval = dap_rom_display(cmd, ap, base_addr + (int32_t)(romentry & ARM_CS_ROMENTRY_OFFSET_MASK), - depth + 1); - if (retval != ERROR_OK) - return retval; - } else if (romentry != 0) { - command_print(cmd, "\t\tComponent not present"); - } else { - command_print(cmd, "\t%s\tEnd of ROM table", tabs); - break; - } - } + rom_num_entries = 960; } else if (class == ARM_CS_CLASS_0X9_CS_COMPONENT) { uint32_t devtype; retval = mem_ap_read_atomic_u32(ap, base_addr + ARM_CS_C9_DEVTYPE, &devtype); @@ -1545,6 +1526,50 @@ static int dap_rom_display(struct command_invocation *cmd, return retval; /* REVISIT also show ARM_CS_C9_DEVID */ + + uint32_t devarch; + retval = mem_ap_read_atomic_u32(ap, base_addr + ARM_CS_C9_DEVARCH, &devarch); + if (retval != ERROR_OK) + return retval; + + if ((devarch & ARM_CS_C9_DEVARCH_PRESENT) == 0) + return ERROR_OK; + + unsigned int architect_id = (devarch & ARM_CS_C9_DEVARCH_ARCHITECT_MASK) >> ARM_CS_C9_DEVARCH_ARCHITECT_SHIFT; + unsigned int revision = (devarch & ARM_CS_C9_DEVARCH_REVISION_MASK) >> ARM_CS_C9_DEVARCH_REVISION_SHIFT; + command_print(cmd, "\t\tDev Arch is 0x%08" PRIx32 ", %s \"%s\" rev.%u", devarch, + jep106_manufacturer(architect_id), class0x9_devarch_description(devarch), + revision); + /* quit if not ROM table */ + if ((devarch & DEVARCH_ID_MASK) != DEVARCH_ROM_C_0X9) + return ERROR_OK; + + rom_num_entries = 512; + } else { + /* Class other than 0x1 and 0x9 */ + return ERROR_OK; + } + + /* Read ROM table entries from base address until we get 0x00000000 or reach the reserved area */ + for (unsigned int entry_offset = 0; entry_offset < 4 * rom_num_entries; entry_offset += 4) { + uint32_t romentry; + retval = mem_ap_read_atomic_u32(ap, base_addr + entry_offset, &romentry); + if (retval != ERROR_OK) + return retval; + command_print(cmd, "\t%sROMTABLE[0x%x] = 0x%08" PRIx32 "", + tabs, entry_offset, romentry); + if (romentry & ARM_CS_ROMENTRY_PRESENT) { + /* Recurse. "romentry" is signed */ + retval = dap_rom_display(cmd, ap, base_addr + (int32_t)(romentry & ARM_CS_ROMENTRY_OFFSET_MASK), + depth + 1); + if (retval != ERROR_OK) + return retval; + } else if (romentry != 0) { + command_print(cmd, "\t\tComponent not present"); + } else { + command_print(cmd, "\t%s\tEnd of ROM table", tabs); + break; + } } return ERROR_OK; |