aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorTomas Vanek <vanekt@fbl.cz>2020-10-22 20:36:30 +0200
committerAntonio Borneo <borneo.antonio@gmail.com>2020-11-15 21:09:08 +0000
commitb1f488ec1ea4c8b5410026610c621f85b5ff17f3 (patch)
tree013edd9d573169f008385c0b799fc6e85a9aa9dd
parent608299484d52a60082bb7ff5bcde5249f9a3a1de (diff)
downloadriscv-openocd-b1f488ec1ea4c8b5410026610c621f85b5ff17f3.zip
riscv-openocd-b1f488ec1ea4c8b5410026610c621f85b5ff17f3.tar.gz
riscv-openocd-b1f488ec1ea4c8b5410026610c621f85b5ff17f3.tar.bz2
target/armv7m, cortex_m: fix misleading comments
Change-Id: I4fea29f07f4d3b8b2578b538ef0eef5f1eea285f Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5876 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
-rw-r--r--src/target/armv7m.c3
-rw-r--r--src/target/cortex_m.c12
2 files changed, 9 insertions, 6 deletions
diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 13370b5..f14ce0d 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -493,8 +493,7 @@ int armv7m_start_algorithm(struct target *target,
return ERROR_TARGET_NOT_HALTED;
}
- /* refresh core register cache
- * Not needed if core register cache is always consistent with target process state */
+ /* Store all non-debug execution registers to armv7m_algorithm_info context */
for (unsigned i = 0; i < armv7m->arm.core_cache->num_regs; i++) {
armv7m_algorithm_info->context[i] = buf_get_u32(
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index fc72c0e..94cf824 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -817,15 +817,19 @@ static int cortex_m_resume(struct target *target, int current,
* in parallel with disabled interrupts can cause local faults
* to not be taken.
*
- * REVISIT this clearly breaks non-debug execution, since the
- * PRIMASK register state isn't saved/restored... workaround
- * by never resuming app code after debug execution.
+ * This breaks non-debug (application) execution if not
+ * called from armv7m_start_algorithm() which saves registers.
*/
buf_set_u32(r->value, 0, 1, 1);
r->dirty = true;
r->valid = true;
- /* Make sure we are in Thumb mode */
+ /* Make sure we are in Thumb mode, set xPSR.T bit */
+ /* armv7m_start_algorithm() initializes entire xPSR register.
+ * This duplicity handles the case when cortex_m_resume()
+ * is used with the debug_execution flag directly,
+ * not called through armv7m_start_algorithm().
+ */
r = armv7m->arm.cpsr;
buf_set_u32(r->value, 24, 1, 1);
r->dirty = true;