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| author | Tsukasa #01 (a4lg) <research_trasio@irq.a4lg.com> | 2022-01-21 06:34:13 +0900 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-01-20 13:34:13 -0800 |
| commit | 9780234be4e34702f69d7bcce503f488cf14b327 (patch) | |
| tree | 580b0a22a6f15312a23fb706746f1392e52e7c4c | |
| parent | ba481c27b9ba9176851d3f03dde07a9e1db87aa8 (diff) | |
| download | riscv-opcodes-9780234be4e34702f69d7bcce503f488cf14b327.zip riscv-opcodes-9780234be4e34702f69d7bcce503f488cf14b327.tar.gz riscv-opcodes-9780234be4e34702f69d7bcce503f488cf14b327.tar.bz2 | |
Synchronize priv-instr-table.tex with the Manual (#99)
This commit roughly synchronizes privileged instruction table with the ISA
Manual with slight instruction order modifications, expecting instruction
tables in the ISA Manual are fully generated by riscv-opcodes,
not modified by hand.
This is based on:
* riscv/riscv-isa-manual: commit f30a5f6de685
("Update chapters 2 and 7 for Hypervisor v0.6")
* riscv/riscv-opcodes: commit 65af4131c26f
("Virtual memory updates (#76)")
| -rwxr-xr-x | parse_opcodes | 21 |
1 files changed, 14 insertions, 7 deletions
diff --git a/parse_opcodes b/parse_opcodes index a29180f..5f2ebb8 100755 --- a/parse_opcodes +++ b/parse_opcodes @@ -901,14 +901,21 @@ def make_supervisor_latex_table(): print_subtitle('Supervisor Memory-Management Instructions') print_insts('sfence.vma') print_subtitle('Hypervisor Memory-Management Instructions') - print_insts('hfence.vvma') - print_insts('hfence.gvma') - print_subtitle('Svinval Memory-Management Instructions') + print_insts('hfence.vvma', 'hfence.gvma') + print_subtitle('Hypervisor Virtual-Machine Load and Store Instructions') + print_insts('hlv.b', 'hlv.bu') + print_insts('hlv.h', 'hlv.hu') + print_insts('hlv.w') + print_insts('hlvx.hu', 'hlvx.wu') + print_insts('hsv.b', 'hsv.h', 'hsv.w') + print_subtitle('Hypervisor Virtual-Machine Load and Store Instructions, RV64 only') + print_insts('hlv.wu') + print_insts('hlv.d') + print_insts('hsv.d') + print_subtitle('\emph{Svinval} Memory-Management Extension') print_insts('sinval.vma') - print_insts('sfence.w.inval') - print_insts('sfence.inval.ir') - print_insts('hinval.vvma') - print_insts('hinval.gvma') + print_insts('sfence.w.inval', 'sfence.inval.ir') + print_insts('hinval.vvma', 'hinval.gvma') print_footer('\\caption{RISC-V Privileged Instructions}') def make_latex_table(): |