| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2025-01-29 | Add Load-Store and Store-Load Bypass Tests for Forwarding in Pipelined CPU ↵ | splinedrive | 3 | -2/+16 | |
| (#600) - Enhanced test_macros.h with TEST_LD_ST_BYPASS and TEST_ST_LD_BYPASS macros to validate both load-store and store-load bypassing logic. | |||||
| 2023-02-27 | rv32ui test misaligned load/store data (#459) | Jesse Taube | 2 | -0/+8 | |
| 2020-11-20 | Only attempt to build tests supported by compiler | Andrew Waterman | 1 | -2/+0 | |
| Resolves #303 | |||||
| 2016-08-30 | Share code between rv32ui and rv64ui tests | Andrew Waterman | 34 | -2450/+96 | |
| They were almost identical, so I made them actually identical. This will reduce the burden of writing further tests that span base ISAs. Tests can still be specialized for XLEN with ifdefs on e.g. __riscv64. | |||||
| 2016-08-30 | Add missing RV32 slt[i]u tests | Andrew Waterman | 5 | -147/+21 | |
| Closes #12. | |||||
| 2016-07-11 | Remove instruction width assumptions to support RVC | Andrew Waterman | 1 | -49/+3 | |
| 2016-07-11 | Remove vestigial j instruction test; improve jal test | Andrew Waterman | 3 | -106/+4 | |
| 2016-06-22 | separate ua and um tests from ui testssplit-isa-tests | Howard Mao | 22 | -1258/+0 | |
| 2016-06-14 | rv32ui: sh: Added side effect test (#14) | Sebastian Bøe | 1 | -0/+18 | |
| From the test comment: sh to a word aligned address should only affect the 2 lower bytes and should leave the 2 upper bytes unmodified. In this test we write 2 bytes to the lower 2 bytes of the word tdat11 and then ensure that the both the upper 2 bytes and lower 2 bytes are as expected. | |||||
| 2016-05-22 | Enable LR/SC tests, even for uniprocessors | Andrew Waterman | 2 | -3/+2 | |
| 2016-04-30 | ERET -> xRET; new memory map | Andrew Waterman | 1 | -3/+1 | |
| For now, we no longer build hex files, because the programs don't start at address 0. This decision will likely be revisited. | |||||
| 2016-03-14 | More RV32 tests | Andrew Waterman | 2 | -2/+68 | |
| 2016-03-03 | Make JALR test sensible in RISC-V, rather than SMIPS | Andrew Waterman | 1 | -84/+3 | |
| 2016-02-28 | Strip big-endian tests | Andrew Waterman | 2 | -12/+0 | |
| These tests will likely never support non-standard big-endian systems. | |||||
| 2015-04-13 | Correct expected high value of multiplication | Joakim Andersson | 2 | -8/+7 | |
| 2015-04-12 | Better coverage of mul high instructions | Joakim Andersson | 4 | -0/+31 | |
| 2015-03-16 | revamp vector tests with new privileged spec, and add scalar pt tests | Yunsup Lee | 1 | -2/+3 | |
| 2015-03-12 | Update to new privileged spec | Andrew Waterman | 1 | -3/+7 | |
| 2015-01-09 | Add LICENSE | Andrew Waterman | 60 | -0/+120 | |
| 2014-11-06 | Don't access memory outside of the binary's range | Andrew Waterman | 8 | -0/+8 | |
| 2014-08-28 | Added "simple" test to rv32ui. | Christopher Celio | 2 | -0/+26 | |
| 2014-02-10 | Revert to old AUIPC definition | Andrew Waterman | 1 | -10/+6 | |
| 2014-01-31 | Shrink hex dumps | Andrew Waterman | 8 | -8/+0 | |
| 2014-01-31 | Add rv32si tests, including illegality of shamt[5] | Andrew Waterman | 1 | -9/+0 | |
| 2014-01-31 | Reference TESTNUM instead of x28 directly | Andrew Waterman | 3 | -4/+4 | |
| 2014-01-23 | Done with rv32ui asm test ports | Eric Love | 1 | -2/+2 | |
| 2014-01-23 | Fixed srl, srli | Eric Love | 3 | -25/+35 | |
| 2014-01-23 | srl and srai | Eric Love | 3 | -33/+33 | |
| 2014-01-23 | First round of rv32ui asm tests | Eric Love | 50 | -15/+3410 | |
| 2013-07-25 | Remove JALR static hints | Andrew Waterman | 1 | -1/+1 | |
| 2013-04-29 | add first RV32 tests | Andrew Waterman | 11 | -0/+625 | |
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index : riscv-tests.git | |
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