aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2016-01-12Write 1, not 0, to MIPIAndrew Waterman1-1/+1
2015-12-14change la to li as appropriate in test macrosHoward Mao1-2/+2
2015-12-04Merge pull request #4 from pmundkur/develAndrew Waterman1-1/+6
Add a top-level make clean target.
2015-11-16Update IPI test to work with new mechanismAndrew Waterman1-17/+3
2015-11-06update envAndrew Waterman1-5/+5
2015-10-19Avoid REMU in timer testAndrew Waterman1-2/+7
2015-09-28fix to riscv_test.h in envHoward Mao1-5/+5
2015-09-24Add another recoding testAndrew Waterman1-0/+9
2015-09-21Add another recoding test caseAndrew Waterman1-0/+8
2015-09-20Remove executable permissions from source filesAndrew Waterman32-0/+0
2015-09-20Remove Hwacha v3 testsAndrew Waterman130-42135/+21
2015-09-20Add another FP recoding test caseAndrew Waterman1-6/+20
2015-09-16Add test for FP recoding corner casesAndrew Waterman2-1/+37
2015-08-06Add a top-level make clean target.Prashanth Mundkur1-1/+6
2015-08-03Use medany code model, not PIC, for ISA testsAndrew Waterman1-1/+1
2015-07-17don't pass fpu/vector tests when fpu/vector not presentYunsup Lee1-8/+5
2015-07-06Coherence torture test for VM testsAndrew Waterman2-7/+11
VM tests only support one core, so have the other cores hammer on the memory system to attempt to catch simple coherence regressions.
2015-07-05New M-mode timersAndrew Waterman7-1148/+1102
2015-07-02Fix RV32 handling of syscall argumentsAndrew Waterman2-63/+65
2015-07-01Add _hard_float check in crt.S.Christopher Celio2-8/+8
2015-05-19Add basic WFI testAndrew Waterman5-5/+59
2015-05-14Fix VM, MIP encodingAndrew Waterman1-5/+5
2015-05-09Update to privileged architecture version 1.7Andrew Waterman11-39/+68
2015-05-01Fix dhrystone timing codeAndrew Waterman3-7/+7
2015-05-01Make dhrystone report correct-ish numbersAndrew Waterman6-113/+135
2015-04-21Don't rely on reset values of MSTATUS_UA/SAAndrew Waterman2-3/+18
2015-04-21Fix benchmark compilation/execution on RV32Andrew Waterman2-2/+2
2015-04-13Merge pull request #3 from joerchan/masterAndrew Waterman4-0/+30
Better coverage of mul high instructions
2015-04-13Correct expected high value of multiplicationJoakim Andersson2-8/+7
2015-04-12Better coverage of mul high instructionsJoakim Andersson4-0/+31
2015-04-03Run RV32 tests on spike with --isa=RV32Andrew Waterman6-11/+19
2015-03-30Update envAndrew Waterman1-5/+5
2015-03-27New virtual memory implementation (Sv39)Andrew Waterman2-9/+9
2015-03-25split out S-mode tests and M-mode testsYunsup Lee43-102/+283
2015-03-24Don't assume PRV1/2 and IE1/2 are resetAndrew Waterman2-6/+6
2015-03-21Merge rv64si and rv32si testsAndrew Waterman14-286/+324
2015-03-20Add fdiv testAndrew Waterman3-5/+48
2015-03-17need fence before scall for vector mmYunsup Lee1-0/+2
2015-03-17push envYunsup Lee1-5/+5
2015-03-17relay hwacha cause/aux to scause/sbadaddrYunsup Lee11-24/+24
2015-03-17Merge [shm]call into ecall, [shm]ret into eretAndrew Waterman6-11/+11
2015-03-16revamp vector tests with new privileged spec, and add scalar pt testsYunsup Lee19-165/+61
2015-03-14Add PTE dirty bit testAndrew Waterman3-5/+90
2015-03-12Use hcall instead of mcallAndrew Waterman1-5/+5
2015-03-12Update to new privileged specAndrew Waterman24-229/+174
2015-02-23Added more +/- NaN/inf tests for fcvt.{w/l/wu/lu}.{s/d}Christopher Celio1-8/+43
2015-02-22Added -NaN test for fcvt.{w/h}.sChristopher Celio1-0/+19
2015-02-19Unify rv32/rv64 timer testsAndrew Waterman2-43/+10
2015-02-17change organization to riscvYunsup Lee1-1/+1
2015-02-15Make rv64uf-p-ldst test the sign bit, tooAndrew Waterman1-4/+10