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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-11-16 14:16:05 -0800 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-11-16 14:16:05 -0800 |
| commit | caf75e56098456eb89ce1071e87eef398d8f26fd (patch) | |
| tree | 3ff0ef0582eb885a4c6357e5f8b63a3b7010997a | |
| parent | 0fa9aa8a786584cf7e6f488d96ff875c3e57c651 (diff) | |
| download | riscv-tests-caf75e56098456eb89ce1071e87eef398d8f26fd.zip riscv-tests-caf75e56098456eb89ce1071e87eef398d8f26fd.tar.gz riscv-tests-caf75e56098456eb89ce1071e87eef398d8f26fd.tar.bz2 | |
Update IPI test to work with new mechanism
| -rw-r--r-- | isa/rv64mi/ipi.S | 20 |
1 files changed, 3 insertions, 17 deletions
diff --git a/isa/rv64mi/ipi.S b/isa/rv64mi/ipi.S index 457a9cd..a427b76 100644 --- a/isa/rv64mi/ipi.S +++ b/isa/rv64mi/ipi.S @@ -26,30 +26,16 @@ RVTEST_CODE_BEGIN 1:li a3, 1 bgeu a2, a3, 1b - # wait for all cores to boot - 1: lw a1, (a0) - bltu a1, a3, 1b - - # IPI dominoes - csrr a0, mhartid - 1: bnez a0, 1b - add a0, a0, 1 - rem a0, a0, a3 - csrw send_ipi, a0 + # send a self-IPI + csrwi mipi, 0 1: j 1b mtvec_handler: - csrr a0, mhartid - bnez a0, 2f + bnez a2, fail RVTEST_PASS TEST_PASSFAIL - 2: add a0, a0, 1 - rem a0, a0, a3 - csrw send_ipi, a0 - 1: j 1b - RVTEST_CODE_END .data |