index
:
riscv-tests.git
attempt-travis-fix
ceasetest2
compliance_tests
cs152-sp18-lab3
debug
debug-0.13
debug-clear-satp
debug-delete-sim
debug_auth
debug_disassemble
disable_unavailable
dma-memcpy
eos20-bringup
hw_watchpoint
interrupts
master
misc
no_progbuf
priv
privchange-dontdeleteme
python3
rekall
resume_from_trigger
riscv-tests-sail
rtos
rvt-master
smi-demo
split-isa-tests
sqrt-171
tmp
trap_entry_align
trap_entry_align-1
travis-dev
trigger_priority
usb_error
xlen_fix
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
Age
Commit message (
Expand
)
Author
Files
Lines
2020-03-18
Have both rs=rd and rs!=rd cases in csr.S (#263)
Takahiro
1
-12
/
+15
2020-03-18
Fix shamt.S header (#264)
Takahiro
1
-2
/
+2
2020-03-16
Add a test case rs = rd to jalr.S (#258)
Takahiro
1
-0
/
+16
2020-03-11
Add comment explaining convoluted rv64mi-p-scall behavior
Andrew Waterman
1
-0
/
+6
2020-03-11
Revert "scall: make the intention of the test in machine mode more clear (#246)"
Andrew Waterman
1
-6
/
+1
2020-03-11
Setup a multilevel page table to avoid misaligned superpages caused by variab...
Cedric Orban
1
-0
/
+4
2020-03-06
Don't assume reset state of mscratch (#254)
Paul Donahue
2
-13
/
+13
2020-03-05
bump env (#253)
Han-Kuan Chen
1
-12
/
+12
2020-03-05
Bump riscv-test-env (#252)
Andrew Waterman
1
-5
/
+17
2020-03-05
Clean up gdb parsing code. (#247)
Tim Newsome
1
-42
/
+32
2020-03-05
Add a simple mechanism to skip tests on targets. (#251)
Tim Newsome
2
-1
/
+9
2020-03-02
enable rv32e compatability by replacing reg x29 with reg x7 (#250)
Cedric Orban
1
-12
/
+12
2020-02-27
bump env
Andrew Waterman
1
-10
/
+5
2020-02-21
scall: make the intention of the test in machine mode more clear (#246)
Nils Asmussen
1
-1
/
+6
2020-02-20
Fix rv64mi-p-csr on systems with FPUs
Andrew Waterman
1
-2
/
+3
2020-02-14
Add tests for vector register access (#244)
Tim Newsome
5
-34
/
+137
2020-02-11
Generate very different values on different harts. (#238)
Tim Newsome
2
-4
/
+5
2020-02-11
Run OpenOCD output through spike-dasm. (#239)
Tim Newsome
1
-3
/
+9
2020-02-11
Look for \bmain\b instead of ' main '. (#237)
Tim Newsome
1
-2
/
+2
2020-02-08
Solves https://github.com/riscv/riscv-tests/issues/241 : Each mhartid has the...
Sho Nakatani
1
-2
/
+2
2020-01-31
Added CSR test cases on whether writing 0 to CSR works, as that might get ove...
Torbjørn Viem Ness
1
-0
/
+2
2020-01-15
Force DMI busy in all tests. (#235)
Tim Newsome
2
-15
/
+44
2020-01-09
Smoke test virtual address translation support. (#233)
Tim Newsome
6
-13
/
+231
2019-12-28
benchmarks: Disassemble .text.init section (#230)
Albert Ou
1
-1
/
+1
2019-12-24
submodule: bump env version (#229)
Chih-Min Chao
1
-5
/
+10
2019-12-18
Hardcode misa values for all spike targets. (#227)
Tim Newsome
9
-7
/
+27
2019-12-18
Tell people where to get software. (#226)
Tim Newsome
1
-3
/
+9
2019-12-10
benchmarks: Simplify TLS initialisation (#224)
James Clarke
3
-19
/
+5
2019-12-10
Improve parallellism in debug test Makefile (#223)
Tim Newsome
2
-15
/
+28
2019-12-02
Use a small binary to set up HiFive Unleashed. (#221)
Tim Newsome
3
-10
/
+10
2019-11-22
Move to Python 3. (#218)
Tim Newsome
4
-75
/
+78
2019-11-04
Remove cruft from icache-alias test
Andrew Waterman
1
-35
/
+0
2019-11-04
Add rv64si-p-icache-alias
Andrew Waterman
2
-0
/
+177
2019-10-15
Add support to run all tests against HiFive Unleashed. (#212)
Tim Newsome
7
-3
/
+191
2019-10-09
Remove ocd_ prefix. (#210)
Tim Newsome
4
-4
/
+4
2019-09-24
Redo the debug README. (#205)
Tim Newsome
1
-26
/
+19
2019-09-24
Look for binaries in $PATH. (#208)
Tim Newsome
1
-7
/
+4
2019-09-19
Small debug test improvements. (#204)
Tim Newsome
0
-0
/
+0
2019-08-02
Miscellaneous minor test improvements (#199)
Tim Newsome
4
-19
/
+20
2019-07-29
Support RV32E. Fixed #198 (#200)
Leway Colin
3
-42
/
+42
2019-07-15
Make tests work with RV32E targets. (#196)
Tim Newsome
5
-27
/
+45
2019-07-15
Use work area in spike-1 to cover CRC algorithm. (#195)
Tim Newsome
2
-1
/
+6
2019-07-01
pmp: first set the address, then cfg (#194)
Pentin Alexander Sergeevich
1
-1
/
+1
2019-06-14
Work better with mainline gdb (#192)
Tim Newsome
2
-23
/
+46
2019-05-16
Cover with/without halt groups. (#191)
Tim Newsome
5
-12
/
+20
2019-04-20
Merge branch 'neelgala-master'
Andrew Waterman
1
-19
/
+4
2019-04-20
masking no longer required.
Neel
1
-16
/
+0
2019-04-20
removing check for reset value of type in mcontrol
Neel
1
-10
/
+8
2019-04-20
fix for #159 #158
Neel
1
-4
/
+7
2019-04-08
Test lack of abstract CSR access. (#187)
Tim Newsome
7
-8
/
+14
[prev]
[next]