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riscv-isa-sim.git
confprec
cs250
cycleh
debug_rom
debug_rom_fence
device_flags
dtm_reset_error
dts_parsing
dynamic
eos18-bringup
factor-out-macros
fix-bf16
force-rtti
fp-encoding
heterogeneous_mc
hwachav4
increase-stack-size
itrigger-etrigger-cleanup
load_reservation_set_size
log-commits-faster
master
mmio-hack
mvp
no_progbuf
no_progbuf2
nolibfdt
p-ext-0.5.2
plctlab-plct-zce-fix2
plic-clint-endian
plic_uart_v1
priv-1.10
private-l1-caches
pte-info-and-delegation
remove-tests
rivosinc-etrigger_fix_exception_match
rva-profile-support
simplify-misaligned
sodor
sparse-mem
speedup-hacks
static-link
test
tmp
trigger_priority
tweak_debug_rom
whole-archive
sifive/rvv0.9-phase2
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Commit message (
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Author
Files
Lines
2015-04-03
Support setting ISA/subsets with --isa flag
Andrew Waterman
163
-120
/
+282
2015-04-02
Simplify RV32 comparisons
Andrew Waterman
11
-11
/
+10
2015-03-31
Allow writing mstatus.fs even if FPU isn't present
Andrew Waterman
2
-5
/
+6
2015-03-30
Implement RVC draft
Andrew Waterman
26
-440
/
+593
2015-03-26
Serialize counters without throwing C++ exceptions
Andrew Waterman
3
-22
/
+27
2015-03-26
New virtual memory implementation (Sv39)
Andrew Waterman
3
-63
/
+79
2015-03-25
Update state.pc on every instruction
Andrew Waterman
1
-4
/
+3
2015-03-20
For misaligned fetch, set mepc = addr of branch/jump
Andrew Waterman
1
-1
/
+5
2015-03-17
bugfix, mbadaddr should be writable
Yunsup Lee
1
-0
/
+1
2015-03-17
Merge [shm]call into ecall, [shm]ret into eret
Andrew Waterman
7
-38
/
+24
2015-03-16
bugfix in raising accelerator interrupts
Yunsup Lee
1
-1
/
+8
2015-03-14
Don't set dirty/referenced bits w/o permission
Andrew Waterman
2
-15
/
+16
2015-03-12
Use hcall instead of mcall
Andrew Waterman
4
-8
/
+13
2015-03-12
Implement PTE referenced/dirty bits
Andrew Waterman
3
-14
/
+16
2015-03-12
Update to new privileged spec
Andrew Waterman
68
-419
/
+582
2015-02-08
Use xlen, not xprlen, to refer to x-register width
Andrew Waterman
19
-35
/
+35
2015-01-27
Fixed masking/casting logic in commit log printf.
Christopher Celio
1
-5
/
+7
2015-01-26
Fix commit log
Andrew Waterman
3
-15
/
+15
2015-01-09
Fix bug where C compiler used instead of C++ for autoconf tests
Stephen Twigg
1
-0
/
+2
2015-01-02
Require 4-byte instruction alignment until RVC is reimplemented
Andrew Waterman
1
-1
/
+2
2015-01-02
On misaligned fetch, set EPC to target, not branch itself
Andrew Waterman
4
-10
/
+9
2015-01-02
Reduce dependences on auto-generated code
Andrew Waterman
5
-14
/
+14
2014-12-04
Support 2/4/6/8-byte instructions
Andrew Waterman
3
-41
/
+62
2014-12-04
Set badvaddr on instruction page faults
Andrew Waterman
3
-5
/
+4
2014-12-03
Update register names to match new ABI
Andrew Waterman
1
-8
/
+8
2014-11-30
Implement timer faithfully
Andrew Waterman
9
-56
/
+86
2014-11-25
Factor out the dummy RoCC accelerator
Andrew Waterman
5
-137
/
+3
2014-11-22
Revert "Enable support for the four custom instructions"
Yunsup Lee
25
-72
/
+0
2014-11-19
Add missing makefile dependence
Andrew Waterman
1
-1
/
+2
2014-10-30
dummy-rocc-test build fix
Arun Thomas
1
-2
/
+2
2014-10-23
Enable support for the four custom instructions
Arun Thomas
25
-0
/
+72
2014-09-27
Avoid some unused variable warnings
Andrew Waterman
3
-15
/
+20
2014-09-27
Avoid use of __int128_t
Andrew Waterman
10
-22
/
+53
2014-09-20
Update riscv.ac to set CPPFLAGS with fesvr include path
Arun Thomas
1
-1
/
+1
2014-08-25
clean up warnings from clang
Scott Beamer
2
-3
/
+1
2014-08-15
Added PC histogram option.
Christopher Celio
5
-1
/
+48
2014-08-07
Support uarch counters (degenerately)
Andrew Waterman
1
-0
/
+17
2014-07-24
added support for register convention names in debug mode
Scott Beamer
2
-2
/
+23
2014-07-08
Disallow access to FCSR when FP is disabled
Andrew Waterman
2
-17
/
+24
2014-07-07
Use precompiled headers to speed up compilation
Andrew Waterman
3
-7
/
+10
2014-07-07
Minor refactoring
Andrew Waterman
1
-13
/
+13
2014-06-13
Commit log now prints while interrupts are enabled.
Christopher Celio
2
-14
/
+17
2014-06-13
Only print commit log if instruction commits
Andrew Waterman
3
-5
/
+21
2014-06-12
Set status.u64 to true on boot
Andrew Waterman
1
-1
/
+1
2014-04-03
Merge branch 'tm'
Stephen Twigg
1
-3
/
+3
2014-04-03
Sync encoding in opcodes
Stephen Twigg
1
-3
/
+15
2014-03-18
Support RV32 RDTIMEH/RDCYCLEH/RDINSTRETH
Andrew Waterman
8
-11
/
+29
2014-03-15
speed up compilation a bit
Andrew Waterman
2
-2
/
+2
2014-03-11
New FP encoding
Andrew Waterman
1
-42
/
+42
2014-03-06
Add fclass.{s|d} instructions
Andrew Waterman
3
-0
/
+10
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