index
:
riscv-isa-sim.git
confprec
cs250
cycleh
debug_rom
debug_rom_fence
device_flags
dtm_reset_error
dts_parsing
dynamic
eos18-bringup
factor-out-macros
fix-bf16
force-rtti
fp-encoding
heterogeneous_mc
hwachav4
increase-stack-size
itrigger-etrigger-cleanup
load_reservation_set_size
log-commits-faster
master
mmio-hack
mvp
no_progbuf
no_progbuf2
nolibfdt
p-ext-0.5.2
plctlab-plct-zce-fix2
plic-clint-endian
plic_uart_v1
priv-1.10
private-l1-caches
pte-info-and-delegation
remove-tests
rivosinc-etrigger_fix_exception_match
rva-profile-support
simplify-misaligned
sodor
sparse-mem
speed2
speedup-hacks
static-link
test
tmp
trigger_priority
tweak_debug_rom
whole-archive
sifive/rvv0.9-phase2
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Author
Files
Lines
2020-05-28
rvv: add amo instructions
Chih-Min Chao
40
-54
/
+268
2020-05-28
rvv: add new singed/unsiged extension instructions
Chih-Min Chao
9
-0
/
+70
2020-05-28
rvv: extenc VU structure to support 0.9 new fields
Chih-Min Chao
3
-8
/
+28
2020-05-28
rvv: wrap align and overlap checking macro
Chih-Min Chao
6
-9
/
+36
2020-05-28
rvv: remove vmlen
Chih-Min Chao
16
-49
/
+42
2020-05-28
rvv: op: change funary op
Chih-Min Chao
1
-47
/
+47
2020-05-28
rvv: handle inactive and NaN case for vfredsum
Chih-Min Chao
7
-2
/
+57
2020-05-26
Report haltgroup halt cause, per the debug spec. (#473)
Tim Newsome
5
-6
/
+13
2020-05-22
Make gen_icache script use only POSIX commands (#470)
anthony-coulter
1
-2
/
+3
2020-05-20
Make sure VLEN/ELEN/SLEN are initialized even without V extension
Andrew Waterman
1
-2
/
+1
2020-05-19
Fix state.misa garbage initialization
Udit Khanna
1
-1
/
+1
2020-05-18
fix clang compile error wthin FDT parsing
Scott Beamer
2
-7
/
+7
2020-05-12
Hardwire mstatus.[sie,spie] to zero if 'S' mode absent
Udit Khanna
1
-3
/
+2
2020-05-10
Merge branch 'configurable_PMP'
Andrew Waterman
8
-39
/
+252
2020-05-10
Implement coarse-grain PMP matching logic
Andrew Waterman
1
-6
/
+6
2020-05-10
Implement CSR read/write behavior for coarse-grain PMP
Andrew Waterman
2
-2
/
+11
2020-05-10
Implement configurable PMP count
Andrew Waterman
1
-6
/
+16
2020-05-10
Disable PMP checks when configuration includes zero PMP registers
Andrew Waterman
1
-1
/
+1
2020-05-09
Support consuming PMP number and granularity from DTB
Andrew Waterman
3
-0
/
+37
2020-05-09
Rename n_pmp constant to max_pmp
Andrew Waterman
3
-12
/
+12
2020-05-06
Add missing stdexcept imports
Schuyler Eldridge
1
-0
/
+1
2020-05-04
parser: fp16: require F extension
Chih-Min Chao
1
-0
/
+3
2020-05-04
rvv: fp16: support element movement instructions
Chih-Min Chao
6
-15
/
+67
2020-05-04
rvv: fp16: support vfwxxx.[wv][vf] instructions
Chih-Min Chao
19
-19
/
+96
2020-05-04
rvv: fp16: support conversion instrucitons
Chih-Min Chao
22
-126
/
+151
2020-05-04
rvv: fp16: support reduction instructions
Chih-Min Chao
7
-15
/
+56
2020-05-04
rvv: fp16: support comparison instructions
Chih-Min Chao
11
-2
/
+39
2020-05-04
rvv: fp16: support .vf instructions
Chih-Min Chao
25
-5
/
+89
2020-05-04
rvv: fp16: support .vv instructions
Chih-Min Chao
22
-3
/
+74
2020-05-04
rvv: remove unused WIDE_END loop macro
Chih-Min Chao
8
-16
/
+11
2020-05-04
fp16: add helper macro
Chih-Min Chao
1
-0
/
+8
2020-04-29
rvv: commitlog: report status when memory trap occurs in vector load/store
Chih-Min Chao
1
-6
/
+25
2020-04-28
Merge pull request #456 from chihminchao/rvv-fix-2020-04-28
Andrew Waterman
3
-6
/
+9
2020-04-28
rvv: commitlog: fix vmsgtu.vi and vmsleu.vi dst information
Chih-Min Chao
3
-6
/
+9
2020-04-28
Fix vnclip.wi bug
Andrew Waterman
1
-1
/
+1
2020-04-27
fdt: add pmp granularity function
Chih-Min Chao
2
-3
/
+25
2020-04-27
fdt: add pmp parsing helper
Chih-Min Chao
2
-1
/
+17
2020-04-27
fdt: restructure dtb create and config flow
Chih-Min Chao
2
-17
/
+50
2020-04-27
fdt: option: add --dtb option to specify dtb binary file
Chih-Min Chao
2
-2
/
+22
2020-04-27
fdt: add clint base address parsing helper
Chih-Min Chao
2
-0
/
+65
2020-04-26
fdt: import fdt library from OpenSBI
Chih-Min Chao
1
-0
/
+1
2020-04-24
parser: exhance --isa to support extended extension
Chih-Min Chao
2
-26
/
+77
2020-04-24
rvv: commitlog: fix dst information for int comparison
Chih-Min Chao
1
-20
/
+40
2020-04-24
rvv: leave only SEW-bit segment store
Chih-Min Chao
17
-156
/
+58
2020-04-24
rvv: leave only SEW-bit segment load
Chih-Min Chao
29
-71
/
+74
2020-04-24
rvv: add vfslide1[down|up].vf and refine checking rule
Chih-Min Chao
11
-35
/
+87
2020-04-20
rvv: add float conversion for rtz variants
Chih-Min Chao
8
-0
/
+80
2020-04-20
rvv: fix vcsr related status change
Chih-Min Chao
1
-4
/
+14
2020-04-20
Move vxrm/vxsat from fcsr to vcsr
Andrew Waterman
3
-16
/
+16
2020-04-09
rvv: minor optimization for index load loop
Chih-Min Chao
1
-1
/
+1
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