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author | Yueh-Ting (eop) Chen <yueh.ting.chen@gmail.com> | 2021-12-08 03:18:45 +0800 |
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committer | GitHub <noreply@github.com> | 2021-12-07 11:18:45 -0800 |
commit | 8f16ed328f13eb00fdae921b2e6adf8d6e528f0b (patch) | |
tree | 9b12823d9babd725c43b58c48af4f6260e6181b1 /riscv | |
parent | 522d8a20b7bf4ab5cad0ceaa3b45155fb6d08f76 (diff) | |
download | riscv-isa-sim-8f16ed328f13eb00fdae921b2e6adf8d6e528f0b.zip riscv-isa-sim-8f16ed328f13eb00fdae921b2e6adf8d6e528f0b.tar.gz riscv-isa-sim-8f16ed328f13eb00fdae921b2e6adf8d6e528f0b.tar.bz2 |
Simplify vadc and vsbc (#876)
Diffstat (limited to 'riscv')
-rw-r--r-- | riscv/decode.h | 16 | ||||
-rw-r--r-- | riscv/insns/vadc_vim.h | 7 | ||||
-rw-r--r-- | riscv/insns/vadc_vvm.h | 7 | ||||
-rw-r--r-- | riscv/insns/vadc_vxm.h | 7 | ||||
-rw-r--r-- | riscv/insns/vsbc_vvm.h | 7 | ||||
-rw-r--r-- | riscv/insns/vsbc_vxm.h | 7 |
6 files changed, 15 insertions, 36 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index 313d9f0..c21808f 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -644,6 +644,12 @@ static inline bool is_aligned(const unsigned val, const unsigned pos) vd = (vd & ~mmask) | (((res) << mpos) & mmask); \ } \ P.VU.vstart->write(0); +#define VI_LOOP_WITH_CARRY_BASE \ + VI_GENERAL_LOOP_BASE \ + VI_MASK_VARS \ + auto &v0 = P.VU.elt<uint64_t>(0, midx); \ + const uint128_t op_mask = (UINT64_MAX >> (64 - sew)); \ + uint64_t carry = (v0 >> mpos) & 0x1; #define VI_LOOP_CMP_BASE \ require(P.VU.vsew >= e8 && P.VU.vsew <= e64); \ @@ -1452,10 +1458,9 @@ static inline bool is_aligned(const unsigned val, const unsigned pos) VI_LOOP_CARRY_END #define VI_VV_LOOP_WITH_CARRY(BODY) \ - require(insn.rd() != 0); \ + require_vm; \ VI_CHECK_SSS(true); \ - VI_GENERAL_LOOP_BASE \ - VI_MASK_VARS \ + VI_LOOP_WITH_CARRY_BASE \ if (sew == e8){ \ VV_WITH_CARRY_PARAMS(e8) \ BODY; \ @@ -1472,10 +1477,9 @@ static inline bool is_aligned(const unsigned val, const unsigned pos) VI_LOOP_END #define VI_XI_LOOP_WITH_CARRY(BODY) \ - require(insn.rd() != 0); \ + require_vm; \ VI_CHECK_SSS(false); \ - VI_GENERAL_LOOP_BASE \ - VI_MASK_VARS \ + VI_LOOP_WITH_CARRY_BASE \ if (sew == e8){ \ XI_WITH_CARRY_PARAMS(e8) \ BODY; \ diff --git a/riscv/insns/vadc_vim.h b/riscv/insns/vadc_vim.h index 824fac9..4b0356f 100644 --- a/riscv/insns/vadc_vim.h +++ b/riscv/insns/vadc_vim.h @@ -1,10 +1,5 @@ // vadc.vim vd, vs2, simm5, v0 VI_XI_LOOP_WITH_CARRY ({ - auto &v0 = P.VU.elt<uint64_t>(0, midx); - const uint128_t op_mask = (UINT64_MAX >> (64 - sew)); - uint64_t carry = (v0 >> mpos) & 0x1; - - uint128_t res = (op_mask & simm5) + (op_mask & vs2) + carry; - vd = res; + vd = (uint128_t)((op_mask & simm5) + (op_mask & vs2) + carry); }) diff --git a/riscv/insns/vadc_vvm.h b/riscv/insns/vadc_vvm.h index 2d6803a..7b41dd9 100644 --- a/riscv/insns/vadc_vvm.h +++ b/riscv/insns/vadc_vvm.h @@ -1,10 +1,5 @@ // vadc.vvm vd, vs2, rs1, v0 VI_VV_LOOP_WITH_CARRY ({ - auto &v0 = P.VU.elt<uint64_t>(0, midx); - const uint128_t op_mask = (UINT64_MAX >> (64 - sew)); - uint64_t carry = (v0 >> mpos) & 0x1; - - uint128_t res = (op_mask & vs1) + (op_mask & vs2) + carry; - vd = res; + vd = (uint128_t)((op_mask & vs1) + (op_mask & vs2) + carry); }) diff --git a/riscv/insns/vadc_vxm.h b/riscv/insns/vadc_vxm.h index 0d2d052..b1f8886 100644 --- a/riscv/insns/vadc_vxm.h +++ b/riscv/insns/vadc_vxm.h @@ -1,10 +1,5 @@ // vadc.vxm vd, vs2, rs1, v0 VI_XI_LOOP_WITH_CARRY ({ - auto &v0 = P.VU.elt<uint64_t>(0, midx); - const uint128_t op_mask = (UINT64_MAX >> (64 - sew)); - uint64_t carry = (v0 >> mpos) & 0x1; - - uint128_t res = (op_mask & rs1) + (op_mask & vs2) + carry; - vd = res; + vd = (uint128_t)((op_mask & rs1) + (op_mask & vs2) + carry); }) diff --git a/riscv/insns/vsbc_vvm.h b/riscv/insns/vsbc_vvm.h index 96b8bb8..8ab6d44 100644 --- a/riscv/insns/vsbc_vvm.h +++ b/riscv/insns/vsbc_vvm.h @@ -1,10 +1,5 @@ // vsbc.vvm vd, vs2, rs1, v0 VI_VV_LOOP_WITH_CARRY ({ - auto &v0 = P.VU.elt<uint64_t>(0, midx); - const uint128_t op_mask = (UINT64_MAX >> (64 - sew)); - uint64_t carry = (v0 >> mpos) & 0x1; - - uint128_t res = (op_mask & vs2) - (op_mask & vs1) - carry; - vd = res; + vd = (uint128_t)((op_mask & vs2) - (op_mask & vs1) - carry); }) diff --git a/riscv/insns/vsbc_vxm.h b/riscv/insns/vsbc_vxm.h index c6f9ca8..fc98321 100644 --- a/riscv/insns/vsbc_vxm.h +++ b/riscv/insns/vsbc_vxm.h @@ -1,10 +1,5 @@ // vsbc.vxm vd, vs2, rs1, v0 VI_XI_LOOP_WITH_CARRY ({ - auto &v0 = P.VU.elt<uint64_t>(0, midx); - const uint128_t op_mask = (UINT64_MAX >> (64 - sew)); - uint64_t carry = (v0 >> mpos) & 0x1; - - uint128_t res = (op_mask & vs2) - (op_mask & rs1) - carry; - vd = res; + vd = (uint128_t)((op_mask & vs2) - (op_mask & rs1) - carry); }) |