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author | Andrew Waterman <andrew@sifive.com> | 2021-12-07 11:17:36 -0800 |
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committer | GitHub <noreply@github.com> | 2021-12-07 11:17:36 -0800 |
commit | 522d8a20b7bf4ab5cad0ceaa3b45155fb6d08f76 (patch) | |
tree | 8770b9cf3f66939f5f13eb1c5ef541d7cbd2dcc3 /riscv | |
parent | 49289b07b4418f48494973a48894d75410ac76fd (diff) | |
parent | d177f05b7bd01f25a16e8cc0712fa551bdaeb954 (diff) | |
download | riscv-isa-sim-522d8a20b7bf4ab5cad0ceaa3b45155fb6d08f76.zip riscv-isa-sim-522d8a20b7bf4ab5cad0ceaa3b45155fb6d08f76.tar.gz riscv-isa-sim-522d8a20b7bf4ab5cad0ceaa3b45155fb6d08f76.tar.bz2 |
Merge pull request #868 from eopXD/simplify-narrowing-inst
Simplify narrowing instruction
Diffstat (limited to 'riscv')
-rw-r--r-- | riscv/decode.h | 101 | ||||
-rw-r--r-- | riscv/insns/vnclip_wi.h | 4 | ||||
-rw-r--r-- | riscv/insns/vnclip_wv.h | 4 | ||||
-rw-r--r-- | riscv/insns/vnclip_wx.h | 4 | ||||
-rw-r--r-- | riscv/insns/vnclipu_wi.h | 4 | ||||
-rw-r--r-- | riscv/insns/vnclipu_wv.h | 4 | ||||
-rw-r--r-- | riscv/insns/vnclipu_wx.h | 4 | ||||
-rw-r--r-- | riscv/insns/vnsra_wi.h | 2 | ||||
-rw-r--r-- | riscv/insns/vnsra_wv.h | 2 | ||||
-rw-r--r-- | riscv/insns/vnsra_wx.h | 2 | ||||
-rw-r--r-- | riscv/insns/vnsrl_wi.h | 2 | ||||
-rw-r--r-- | riscv/insns/vnsrl_wv.h | 2 | ||||
-rw-r--r-- | riscv/insns/vnsrl_wx.h | 2 |
13 files changed, 72 insertions, 65 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index 4d37530..313d9f0 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -794,19 +794,19 @@ static inline bool is_aligned(const unsigned val, const unsigned pos) auto &vd = P.VU.elt<type_sew_t<x>::type>(rd_num, i, true); \ auto vs2 = P.VU.elt<type_sew_t<x>::type>(rs2_num, i - offset); -#define VI_NSHIFT_PARAMS(sew1, sew2) \ +#define VI_NARROW_PARAMS(sew1, sew2) \ auto &vd = P.VU.elt<type_usew_t<sew1>::type>(rd_num, i, true); \ auto vs2_u = P.VU.elt<type_usew_t<sew2>::type>(rs2_num, i); \ auto vs2 = P.VU.elt<type_sew_t<sew2>::type>(rs2_num, i); \ auto zimm5 = (type_usew_t<sew1>::type)insn.v_zimm5(); -#define VX_NSHIFT_PARAMS(sew1, sew2) \ +#define VX_NARROW_PARAMS(sew1, sew2) \ auto &vd = P.VU.elt<type_usew_t<sew1>::type>(rd_num, i, true); \ auto vs2_u = P.VU.elt<type_usew_t<sew2>::type>(rs2_num, i); \ auto vs2 = P.VU.elt<type_sew_t<sew2>::type>(rs2_num, i); \ auto rs1 = (type_sew_t<sew1>::type)RS1; -#define VV_NSHIFT_PARAMS(sew1, sew2) \ +#define VV_NARROW_PARAMS(sew1, sew2) \ auto &vd = P.VU.elt<type_usew_t<sew1>::type>(rd_num, i, true); \ auto vs2_u = P.VU.elt<type_usew_t<sew2>::type>(rs2_num, i); \ auto vs2 = P.VU.elt<type_sew_t<sew2>::type>(rs2_num, i); \ @@ -1174,84 +1174,91 @@ static inline bool is_aligned(const unsigned val, const unsigned pos) // narrow operation loop #define VI_VV_LOOP_NARROW(BODY) \ -VI_NARROW_CHECK_COMMON; \ -VI_LOOP_BASE \ -if (sew == e8){ \ - VI_NARROW_SHIFT(e8, e16) \ - BODY; \ -}else if(sew == e16){ \ - VI_NARROW_SHIFT(e16, e32) \ - BODY; \ -}else if(sew == e32){ \ - VI_NARROW_SHIFT(e32, e64) \ - BODY; \ -} \ -VI_LOOP_END - -#define VI_NARROW_SHIFT(sew1, sew2) \ - type_usew_t<sew1>::type &vd = P.VU.elt<type_usew_t<sew1>::type>(rd_num, i, true); \ - type_usew_t<sew2>::type vs2_u = P.VU.elt<type_usew_t<sew2>::type>(rs2_num, i); \ - type_usew_t<sew1>::type zimm5 = (type_usew_t<sew1>::type)insn.v_zimm5(); \ - type_sew_t<sew2>::type vs2 = P.VU.elt<type_sew_t<sew2>::type>(rs2_num, i); \ - type_sew_t<sew1>::type vs1 = P.VU.elt<type_sew_t<sew1>::type>(rs1_num, i); \ - type_sew_t<sew1>::type rs1 = (type_sew_t<sew1>::type)RS1; - -#define VI_VVXI_LOOP_NARROW(BODY, is_vs1) \ - VI_CHECK_SDS(is_vs1); \ + VI_CHECK_SDS(true); \ VI_LOOP_BASE \ if (sew == e8){ \ - VI_NARROW_SHIFT(e8, e16) \ + VV_NARROW_PARAMS(e8, e16) \ BODY; \ - } else if (sew == e16) { \ - VI_NARROW_SHIFT(e16, e32) \ + }else if(sew == e16){ \ + VV_NARROW_PARAMS(e16, e32) \ BODY; \ - } else if (sew == e32) { \ - VI_NARROW_SHIFT(e32, e64) \ + }else if(sew == e32){ \ + VV_NARROW_PARAMS(e32, e64) \ + BODY; \ + } \ + VI_LOOP_END + +#define VI_VX_LOOP_NARROW(BODY) \ + VI_CHECK_SDS(false); \ + VI_LOOP_BASE \ + if (sew == e8){ \ + VX_NARROW_PARAMS(e8, e16) \ + BODY; \ + }else if(sew == e16){ \ + VX_NARROW_PARAMS(e16, e32) \ + BODY; \ + }else if(sew == e32){ \ + VX_NARROW_PARAMS(e32, e64) \ + BODY; \ + } \ + VI_LOOP_END + +#define VI_VI_LOOP_NARROW(BODY) \ + VI_CHECK_SDS(false); \ + VI_LOOP_BASE \ + if (sew == e8){ \ + VI_NARROW_PARAMS(e8, e16) \ + BODY; \ + }else if(sew == e16){ \ + VI_NARROW_PARAMS(e16, e32) \ + BODY; \ + }else if(sew == e32){ \ + VI_NARROW_PARAMS(e32, e64) \ BODY; \ } \ VI_LOOP_END -#define VI_VI_LOOP_NSHIFT(BODY, is_vs1) \ - VI_CHECK_SDS(is_vs1); \ +#define VI_VI_LOOP_NSHIFT(BODY) \ + VI_CHECK_SDS(false); \ VI_LOOP_NSHIFT_BASE \ if (sew == e8){ \ - VI_NSHIFT_PARAMS(e8, e16) \ + VI_NARROW_PARAMS(e8, e16) \ BODY; \ } else if (sew == e16) { \ - VI_NSHIFT_PARAMS(e16, e32) \ + VI_NARROW_PARAMS(e16, e32) \ BODY; \ } else if (sew == e32) { \ - VI_NSHIFT_PARAMS(e32, e64) \ + VI_NARROW_PARAMS(e32, e64) \ BODY; \ } \ VI_LOOP_END -#define VI_VX_LOOP_NSHIFT(BODY, is_vs1) \ - VI_CHECK_SDS(is_vs1); \ +#define VI_VX_LOOP_NSHIFT(BODY) \ + VI_CHECK_SDS(false); \ VI_LOOP_NSHIFT_BASE \ if (sew == e8){ \ - VX_NSHIFT_PARAMS(e8, e16) \ + VX_NARROW_PARAMS(e8, e16) \ BODY; \ } else if (sew == e16) { \ - VX_NSHIFT_PARAMS(e16, e32) \ + VX_NARROW_PARAMS(e16, e32) \ BODY; \ } else if (sew == e32) { \ - VX_NSHIFT_PARAMS(e32, e64) \ + VX_NARROW_PARAMS(e32, e64) \ BODY; \ } \ VI_LOOP_END -#define VI_VV_LOOP_NSHIFT(BODY, is_vs1) \ - VI_CHECK_SDS(is_vs1); \ +#define VI_VV_LOOP_NSHIFT(BODY) \ + VI_CHECK_SDS(true); \ VI_LOOP_NSHIFT_BASE \ if (sew == e8){ \ - VV_NSHIFT_PARAMS(e8, e16) \ + VV_NARROW_PARAMS(e8, e16) \ BODY; \ } else if (sew == e16) { \ - VV_NSHIFT_PARAMS(e16, e32) \ + VV_NARROW_PARAMS(e16, e32) \ BODY; \ } else if (sew == e32) { \ - VV_NSHIFT_PARAMS(e32, e64) \ + VV_NARROW_PARAMS(e32, e64) \ BODY; \ } \ VI_LOOP_END diff --git a/riscv/insns/vnclip_wi.h b/riscv/insns/vnclip_wi.h index 6b68e1d..ea6898c 100644 --- a/riscv/insns/vnclip_wi.h +++ b/riscv/insns/vnclip_wi.h @@ -2,7 +2,7 @@ VRM xrm = P.VU.get_vround_mode(); int64_t int_max = INT64_MAX >> (64 - P.VU.vsew); int64_t int_min = INT64_MIN >> (64 - P.VU.vsew); -VI_VVXI_LOOP_NARROW +VI_VI_LOOP_NARROW ({ int128_t result = vs2; unsigned shift = zimm5 & ((sew * 2) - 1); @@ -22,4 +22,4 @@ VI_VVXI_LOOP_NARROW } vd = result; -}, false) +}) diff --git a/riscv/insns/vnclip_wv.h b/riscv/insns/vnclip_wv.h index 5f87697..63b84c6 100644 --- a/riscv/insns/vnclip_wv.h +++ b/riscv/insns/vnclip_wv.h @@ -2,7 +2,7 @@ VRM xrm = P.VU.get_vround_mode(); int64_t int_max = INT64_MAX >> (64 - P.VU.vsew); int64_t int_min = INT64_MIN >> (64 - P.VU.vsew); -VI_VVXI_LOOP_NARROW +VI_VV_LOOP_NARROW ({ int128_t result = vs2; unsigned shift = vs1 & ((sew * 2) - 1); @@ -22,4 +22,4 @@ VI_VVXI_LOOP_NARROW } vd = result; -}, true) +}) diff --git a/riscv/insns/vnclip_wx.h b/riscv/insns/vnclip_wx.h index 5436936..482eace 100644 --- a/riscv/insns/vnclip_wx.h +++ b/riscv/insns/vnclip_wx.h @@ -2,7 +2,7 @@ VRM xrm = P.VU.get_vround_mode(); int64_t int_max = INT64_MAX >> (64 - P.VU.vsew); int64_t int_min = INT64_MIN >> (64 - P.VU.vsew); -VI_VVXI_LOOP_NARROW +VI_VX_LOOP_NARROW ({ int128_t result = vs2; unsigned shift = rs1 & ((sew * 2) - 1); @@ -22,4 +22,4 @@ VI_VVXI_LOOP_NARROW } vd = result; -}, false) +}) diff --git a/riscv/insns/vnclipu_wi.h b/riscv/insns/vnclipu_wi.h index ba39905..441a3a7 100644 --- a/riscv/insns/vnclipu_wi.h +++ b/riscv/insns/vnclipu_wi.h @@ -2,7 +2,7 @@ VRM xrm = P.VU.get_vround_mode(); uint64_t uint_max = UINT64_MAX >> (64 - P.VU.vsew); uint64_t sign_mask = UINT64_MAX << P.VU.vsew; -VI_VVXI_LOOP_NARROW +VI_VI_LOOP_NARROW ({ uint128_t result = vs2_u; unsigned shift = zimm5 & ((sew * 2) - 1); @@ -20,4 +20,4 @@ VI_VVXI_LOOP_NARROW } vd = result; -}, false) +}) diff --git a/riscv/insns/vnclipu_wv.h b/riscv/insns/vnclipu_wv.h index d6647c6..8072489 100644 --- a/riscv/insns/vnclipu_wv.h +++ b/riscv/insns/vnclipu_wv.h @@ -2,7 +2,7 @@ VRM xrm = P.VU.get_vround_mode(); uint64_t uint_max = UINT64_MAX >> (64 - P.VU.vsew); uint64_t sign_mask = UINT64_MAX << P.VU.vsew; -VI_VVXI_LOOP_NARROW +VI_VV_LOOP_NARROW ({ uint128_t result = vs2_u; unsigned shift = vs1 & ((sew * 2) - 1); @@ -19,4 +19,4 @@ VI_VVXI_LOOP_NARROW } vd = result; -}, true) +}) diff --git a/riscv/insns/vnclipu_wx.h b/riscv/insns/vnclipu_wx.h index bf44233..b2d91c3 100644 --- a/riscv/insns/vnclipu_wx.h +++ b/riscv/insns/vnclipu_wx.h @@ -2,7 +2,7 @@ VRM xrm = P.VU.get_vround_mode(); uint64_t uint_max = UINT64_MAX >> (64 - P.VU.vsew); uint64_t sign_mask = UINT64_MAX << P.VU.vsew; -VI_VVXI_LOOP_NARROW +VI_VX_LOOP_NARROW ({ uint128_t result = vs2_u; unsigned shift = rs1 & ((sew * 2) - 1); @@ -19,4 +19,4 @@ VI_VVXI_LOOP_NARROW } vd = result; -}, false) +}) diff --git a/riscv/insns/vnsra_wi.h b/riscv/insns/vnsra_wi.h index f41979e..0502ff1 100644 --- a/riscv/insns/vnsra_wi.h +++ b/riscv/insns/vnsra_wi.h @@ -2,4 +2,4 @@ VI_VI_LOOP_NSHIFT ({ vd = vs2 >> (zimm5 & (sew * 2 - 1) & 0x1f); -}, false) +}) diff --git a/riscv/insns/vnsra_wv.h b/riscv/insns/vnsra_wv.h index 59f255e..555ce3f 100644 --- a/riscv/insns/vnsra_wv.h +++ b/riscv/insns/vnsra_wv.h @@ -2,4 +2,4 @@ VI_VV_LOOP_NSHIFT ({ vd = vs2 >> (vs1 & (sew * 2 - 1)); -}, true) +}) diff --git a/riscv/insns/vnsra_wx.h b/riscv/insns/vnsra_wx.h index adaa24c..05a55e3 100644 --- a/riscv/insns/vnsra_wx.h +++ b/riscv/insns/vnsra_wx.h @@ -2,4 +2,4 @@ VI_VX_LOOP_NSHIFT ({ vd = vs2 >> (rs1 & (sew * 2 - 1)); -}, false) +}) diff --git a/riscv/insns/vnsrl_wi.h b/riscv/insns/vnsrl_wi.h index 91402c0..d4dfcf0 100644 --- a/riscv/insns/vnsrl_wi.h +++ b/riscv/insns/vnsrl_wi.h @@ -2,4 +2,4 @@ VI_VI_LOOP_NSHIFT ({ vd = vs2_u >> (zimm5 & (sew * 2 - 1)); -}, false) +}) diff --git a/riscv/insns/vnsrl_wv.h b/riscv/insns/vnsrl_wv.h index 609299f..ab72b84 100644 --- a/riscv/insns/vnsrl_wv.h +++ b/riscv/insns/vnsrl_wv.h @@ -2,4 +2,4 @@ VI_VV_LOOP_NSHIFT ({ vd = vs2_u >> (vs1 & (sew * 2 - 1)); -}, true) +}) diff --git a/riscv/insns/vnsrl_wx.h b/riscv/insns/vnsrl_wx.h index 8356a2b..e149b38 100644 --- a/riscv/insns/vnsrl_wx.h +++ b/riscv/insns/vnsrl_wx.h @@ -2,4 +2,4 @@ VI_VX_LOOP_NSHIFT ({ vd = vs2_u >> (rs1 & (sew * 2 - 1)); -}, false) +}) |