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author | demin.han <demin.han@starfivetech.com> | 2024-01-12 09:09:07 +0800 |
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committer | demin.han <demin.han@starfivetech.com> | 2024-01-12 09:33:03 +0800 |
commit | 5936e52f11d61af870900acee1810b41f9e81eaf (patch) | |
tree | e95add16205e9ba34d4e11800843be887d62500a /riscv | |
parent | f80fc52e8842d3a5270b787a0fc57028edca5dab (diff) | |
download | riscv-isa-sim-5936e52f11d61af870900acee1810b41f9e81eaf.zip riscv-isa-sim-5936e52f11d61af870900acee1810b41f9e81eaf.tar.gz riscv-isa-sim-5936e52f11d61af870900acee1810b41f9e81eaf.tar.bz2 |
Add missing log commit of mstatush
Signed-off-by: demin.han <demin.han@starfivetech.com>
Diffstat (limited to 'riscv')
-rw-r--r-- | riscv/insns/mret.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/riscv/insns/mret.h b/riscv/insns/mret.h index a6fcd13..7cb1f62 100644 --- a/riscv/insns/mret.h +++ b/riscv/insns/mret.h @@ -10,4 +10,5 @@ s = set_field(s, MSTATUS_MPIE, 1); s = set_field(s, MSTATUS_MPP, p->extension_enabled('U') ? PRV_U : PRV_M); s = set_field(s, MSTATUS_MPV, 0); STATE.mstatus->write(s); +if (STATE.mstatush) STATE.mstatush->write(s >> 32); // log mstatush change p->set_privilege(prev_prv, prev_virt); |