aboutsummaryrefslogtreecommitdiff
path: root/include/sbi_utils
AgeCommit message (Collapse)AuthorFilesLines
2025-11-04lib: utils: Add MPXY RPMI mailbox driver for performanceJoshua Yeong1-0/+118
Add MPXY RPMI mailbox driver for performance. Signed-off-by: Joshua Yeong <joshua.yeong@starfivetech.com> Reviewed-by: Rahul Pathak <rpathak@ventanamicro.com> Link: https://lore.kernel.org/r/20251013153138.1574512-4-joshua.yeong@starfivetech.com Signed-off-by: Anup Patel <anup@brainfault.org>
2025-11-04lib: utils: Add MPXY RPMI mailbox driver for device powerJoshua Yeong1-0/+45
Add MPXY RPMI mailbox driver for device power. Signed-off-by: Joshua Yeong <joshua.yeong@starfivetech.com> Reviewed-by: Rahul Pathak <rpathak@ventanamicro.com> Link: https://lore.kernel.org/r/20251013153138.1574512-3-joshua.yeong@starfivetech.com Signed-off-by: Anup Patel <anup@brainfault.org>
2025-11-04lib: utils: Add MPXY RPMI mailbox driver for voltageJoshua Yeong1-0/+81
Add voltage service group for RPMI/MPXY support Signed-off-by: Joshua Yeong <joshua.yeong@starfivetech.com> Reviewed-by: Rahul Pathak <rpathak@ventanamicro.com> Link: https://lore.kernel.org/r/20251013153138.1574512-2-joshua.yeong@starfivetech.com Signed-off-by: Anup Patel <anup@brainfault.org>
2025-10-28lib: utils/suspend: Add SiFive SMC0 driverNick Hu1-0/+14
The SiFive SMC0 controls the clock and power domain of the core complex on the SiFive platform. The core complex enters the low power state after the secondary cores enter the tile power gating and last core execute the `CEASE` instruction with the corresponding SMC0 configurations. The devices that inside both tile power domain and core complex power domain will be off, including caches and timer. Therefore we need to flush the last level cache before entering the core complex power gating and update the timer after waking up. Reviewed-by: Cyan Yang <cyan.yang@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Nick Hu <nick.hu@sifive.com> Link: https://lore.kernel.org/r/20251020-cache-upstream-v7-12-69a132447d8a@sifive.com Signed-off-by: Anup Patel <anup@brainfault.org>
2025-10-28lib: utils/timer: Expose timer update functionNick Hu1-0/+5
Exposing the ACLINT timer update APIs so the user can update the mtimer after waking up from the non-retentive suspend. Reviewed-by: Cyan Yang <cyan.yang@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Nick Hu <nick.hu@sifive.com> Link: https://lore.kernel.org/r/20251020-cache-upstream-v7-10-69a132447d8a@sifive.com Signed-off-by: Anup Patel <anup@brainfault.org>
2025-10-28lib: utils/hsm: Add SiFive TMC0 driverNick Hu1-0/+20
The SiFive TMC0 controls the tile power domains on SiFive platform. The CPU enters the low power state via the `CEASE` instruction after configuring the TMC0. Any devices that inside the tile power domain will be power gated, including the private cache. Therefore flushing the private cache before entering the low power state. Co-developed-by: Vincent Chen <vincent.chen@sifive.com> Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Reviewed-by: Cyan Yang <cyan.yang@sifive.com> Signed-off-by: Nick Hu <nick.hu@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20251020-cache-upstream-v7-9-69a132447d8a@sifive.com Signed-off-by: Anup Patel <anup@brainfault.org>
2025-10-28lib: utils/irqchip: Add APLIC restore functionNick Hu1-0/+3
Since the APLIC may enter a reset state upon system wake-up from a platform low power state, adding a restore function to reinitialize the APLIC. Reviewed-by: Yong-Xuan Wang <yongxuan.wang@sifive.com> Reviewed-by: Cyan Yang <cyan.yang@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Nick Hu <nick.hu@sifive.com> Link: https://lore.kernel.org/r/20251020-cache-upstream-v7-7-69a132447d8a@sifive.com Signed-off-by: Anup Patel <anup@brainfault.org>
2025-10-28lib: utils/cache: Add fdt cmo helpersNick Hu1-0/+40
Add the helpers to build up the cache hierarchy via FDT and provide some cmo functions for the user who want to flush the entire cache. Signed-off-by: Nick Hu <nick.hu@sifive.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20251020-cache-upstream-v7-4-69a132447d8a@sifive.com Signed-off-by: Anup Patel <anup@brainfault.org>
2025-10-28lib: utils: Add FDT cache libraryNick Hu1-0/+34
Add the FDT cache library so we can build up the cache topology via the 'next-level-cache' DT property. Co-developed-by: Vincent Chen <vincent.chen@sifive.com> Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Co-developed-by: Andy Chiu <andy.chiu@sifive.com> Signed-off-by: Andy Chiu <andy.chiu@sifive.com> Signed-off-by: Nick Hu <nick.hu@sifive.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20251020-cache-upstream-v7-2-69a132447d8a@sifive.com Signed-off-by: Anup Patel <anup@brainfault.org>
2025-10-28lib: utils: Add cache flush libraryNick Hu1-0/+69
The current RISC-V CMO only defines how to flush a cache block. However, certain use cases, such as power management, may require flushing the entire cache. Therefore, a framework is being introduced to allow vendors to flush the entire cache using their own methods. Signed-off-by: Nick Hu <nick.hu@sifive.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20251020-cache-upstream-v7-1-69a132447d8a@sifive.com Signed-off-by: Anup Patel <anup@brainfault.org>
2025-09-16lib: utils/ipi: Convert IPI drivers as early driversAnup Patel1-26/+0
The fdt_ipi_init() is already called from generic_early_init() so let's convert IPI drivers as early drivers. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Tested-by: Nick Hu <nick.hu@sifive.com> Link: https://lore.kernel.org/r/20250904052410.546818-4-apatel@ventanamicro.com Signed-off-by: Anup Patel <anup@brainfault.org>
2025-06-24lib: utils: Add Implementation ID and Version as RPMI MPXY attributesRahul Pathak2-1/+9
The latest frozen RPMI spec has added Implementation ID and Implementation Version as message protocol specific mpxy attributes. Add support for these. Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20250618053854.2577299-1-rpathak@ventanamicro.com Signed-off-by: Anup Patel <anup@brainfault.org>
2025-05-20lib: utils: Fix fdt_mpxy_init() not returning error codeAlvin Chang1-2/+2
It seems that current implementation doesn't fail on fdt_mpxy_init(), because platforms might not have any MPXY devices. In fact, if there are no MPXY devices, fdt_driver_init_all() will return SBI_OK. More importantly, if there is any MPXY device which fails the initialization, OpenSBI must check the error code and stop the booting. Thus, this commit adds the return value for fdt_mpxy_init(). Signed-off-by: Alvin Chang <alvinga@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20250430091007.3768180-1-alvinga@andestech.com Signed-off-by: Anup Patel <anup@brainfault.org>
2025-05-20lib: utils/mpxy: Remove p2a_db_index from RPMI system MSI attributesAnup Patel1-1/+0
The discovery of P2A doorbell system MSI index is now through RPMI shared memory DT node so remove p2a_db_index from RPMI system MSI attributes and access it as a mailbox channel attribute. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Link: https://lore.kernel.org/r/20250512083827.804151-5-apatel@ventanamicro.com Signed-off-by: Anup Patel <anup@brainfault.org>
2025-05-20lib: utils/mailbox: Parse P2A doorbell system MSI index from DTAnup Patel1-0/+1
The P2A doorbell system MSI index is expected to be discovered from device tree instead of RPMI system MSI service group attribute. This is based on ARC feedback before RPMI spec was frozen. Let's parse P2A doorbell system MSI index from device tree and also expose it as rpmi channel attribute to RPMI client drivers. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Link: https://lore.kernel.org/r/20250512083827.804151-3-apatel@ventanamicro.com Signed-off-by: Anup Patel <anup@brainfault.org>
2025-04-24lib: sbi: Set the scratch allocation to alignment to cacheline sizeRaj Vishwanathan1-0/+2
Set the scratch allocation alignment to cacheline size specified by riscv,cbom-block-size in the DTS file to avoid two atomic variables from the same cache line causing livelock on some platforms. If the cacheline is not specified, we set it a default value. Signed-off-by: Raj Vishwanathan <Raj.Vishwanathan@gmail.com> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Link: https://lore.kernel.org/r/20250423225045.267983-1-Raj.Vishwanathan@gmail.com Signed-off-by: Anup Patel <anup@brainfault.org>
2025-04-23lib: utils/fdt: Remove fdt_match_node()Samuel Holland1-3/+0
This function has been obsoleted by the fdt_driver library and is no longer used. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20250325234342.711447-10-samuel.holland@sifive.com Signed-off-by: Anup Patel <anup@brainfault.org>
2025-03-27lib: utils/serial: Add PXA UARTs supportJunhui Liu1-1/+3
The PXA variant of the uart8250 adds the UART Unit Enable bit (UUE) that needs to be set to enable the XScale PXA UART. And it is required for some RISC-V SoCs like the Spacemit K1 that implement the PXA UART. This introduces the "intel,xscale-uart" compatible to handle setting the UUE bit. Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20250327-pxa-uart-support-v2-1-c4400c1fcd0b@pigmoral.tech Signed-off-by: Anup Patel <anup@brainfault.org>
2025-02-19lib: utils/fdt: Allocate fdt_pmu_evt_select on the heapSamuel Holland1-5/+0
This reduces .bss size by 8 KiB, and should reduce overall memory usage since most platforms will have significantly fewer than 512 entries in this table. At the same time, it removes the fixed table size limit. Since the table is only used within fdt_pmu.c, instead of updating the extern declaration, make the table local to this file. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2025-02-13lib: utils: Add MPXY RPMI mailbox driver for System MSI service groupAnup Patel1-0/+88
The supervisor software can directly receive most of the system MSIs except P2A doorbell and MSIs preferred to be handled in M-mode. Add MPXY RPMI mailbox client driver for the System MSI service group. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2025-02-13include: sbi_utils: Update RPMI service group IDs and BASE service groupAnup Patel1-9/+7
The service group ID assignment and some of the BASE services have changes in the latest RPMI specification so let's update the RPMI implementation accordingly. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2025-02-13lib: utils: Populate MPXY channel attributes from RPMI channel attributesAnup Patel1-3/+0
Use the RPMI mailbox channel attributes to populate MPXY channel attributes instead of hard coding them. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2025-02-13lib: utils: Implement get_attribute() for the RPMI shared memory mailboxAnup Patel1-1/+12
To allow clients query service group version of a RPMI mailbox channel, implement get_attribute() callback for the RPMI shared memory mailbox controller. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2025-02-13include: sbi_utils: Include mailbox.h in rpmi_mailbox.h headerAnup Patel1-0/+1
The rpmi_mailbox.h uses structures defined in mailbox.h so let's include mailbox.h in rpmi_mailbox.h header. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2025-02-13lib: utils: Drop notifications from MPXY RPMI mailbox clientAnup Patel1-1/+0
Currently, the common MPXY RPMI mailbox client does not support notifications so no need for dummy notifications support. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
2025-02-13lib: utils: Introduce optional MPXY RPMI service group operationsAnup Patel1-0/+12
Some of the RPMI service groups may need additional context and special handling when transferring messages via underlying mailbox channel so introduce optional MPXY RPMI service group operations for this purpose. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2025-02-13lib: utils: Split the FDT MPXY RPMI mailbox client into two partsAnup Patel1-0/+71
Instead of having one common FDT MPXY RPMI mailbox client drivers for various RPMI service groups, split this driver into two parts: 1) Common MPXY RPMI mailbox client library 2) MPXY driver for RPMI clock service group The above split enables having a separate MPXY driver for each RPMI clock service group and #1 (above) will allow code sharing between various MPXY RPMI drivers. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2025-02-12lib: utils: Initialize miscellaneous drivers in one passSamuel Holland5-109/+3
For driver subsystems that are not tightly integrated into the OpenSBI init sequence, it is not important that the drivers are initialized in any particular order. By putting all of these drivers in one array, they can all be initialized with a single pass through the devicetree. This saves about 10 ms of boot time on HiFive Unmatched. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2025-02-12lib: utils/fdt: Remove fdt_find_match()Samuel Holland1-4/+0
Now that all drivers are using the fdt_driver functions for initialization, this function is unused and can be removed. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2025-02-12lib: utils/irqchip: Use fdt_driver for initializationSamuel Holland1-5/+1
The irqchip driver subsystem does not need any extra data, so it can use `struct fdt_driver` directly. The generic fdt_irqchip_init() performs a best-effort initialization of all matching DT nodes. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2025-01-30include: utils/fdt_helper: fix typo har't'idLeo Yu-Chi Liang1-1/+1
s/hard_id/hartid/ Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-12-24lib: utils: Fix irqchip registration for PLIC and APLICAnup Patel2-0/+8
Currently, the same irqchip instance is registered for multiple PLIC and APLIC instances which causes the sbi_list_for_each_entry() loop in the sbi_irqchip_init() to hang at boot-time. To address the above issue, register a separate irqchip instance for each PLIC and APLIC instance. Fixes: 2dd6eaf68055 ("lib: sbi_irqchip: Call driver warm_init from SBI core") Reported-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
2024-12-21inclue: sbi_utils: Cleanup int vs bool in semihosting_init() definitionsMichael Neuling1-2/+2
This is needed for a future patches to enable the new C23 language dialect. Signed-off-by: Michael Neuling <michaelneuling@tenstorrent.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-12-21lib: utils: Mark RPMI drivers as experimentalSamuel Holland1-0/+1
These drivers were merged on an experimental basis without the RPMI specification being frozen. As a result, they may not be compatible with the frozen version of the RPMI protocol. Additionally, their devicetree bindings have not been reviewed and are subject to change. Warn the user that these drivers make no compatibility guarantees, and that their behavior and devicetree bindings may change incompatibly in future versions of OpenSBI. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-12-06lib: utils/mpxy: Add RPMI client driver for MPXYRahul Pathak1-0/+93
Add a generic RPMI mailbox client driver which provides a MPXY channel. Initially, this driver only supports RPMI clock service group but can be extended to support multiple RPMI service groups. Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com> Co-developed-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2024-12-06lib: utils: Add simple FDT based MPXY driver frameworkAnup Patel1-0/+26
The generic platform can have multiple MPXY drivers so add a simple FDT based MPXY driver framework. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2024-12-06lib: utils/cppc: Add RPMI CPPC driverSubrahmanya Lingappa1-0/+105
Add RPMI based driver for CPPC register read, write and probe. Signed-off-by: Subrahmanya Lingappa <slingappa@ventanamicro.com> Co-developed-by: Rahul Pathak <rpathak@ventanamicro.com> Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com> Co-developed-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2024-12-06lib: utils: Add simple FDT based CPPC driver frameworkAnup Patel1-0/+26
The generic platform can have multiple CPPC drivers so add a simple FDT based CPPC driver framework. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2024-12-06lib: utils/hsm: Add RPMI HSM driverSubrahmanya Lingappa1-0/+92
The RPMI HSM service group provides set of routine to query and control power states of a Hart. Add RPMI based Hart State Management (HSM) driver. Signed-off-by: Subrahmanya Lingappa <slingappa@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2024-12-06lib: utils: Add simple FDT based HSM driver frameworkAnup Patel1-0/+26
The generic platform can have multiple HSM drivers so add a simple FDT based HSM driver framework. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2024-12-06lib: utils/fdt: Allow dynamic registration of FDT fixup callbacksAnup Patel1-0/+15
It should possible to fixup FDT from any part of OpenSBI so add fdt_register_general_fixup() which allows dynamic registration of FDT fixup callbacks. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2024-12-06lib: utils/suspend: Add RPMI system suspend driverSubrahmanya Lingappa1-0/+35
Add RPMI based system suspend driver. To test this, execute the follwoing in Linux: $ echo mem > /sys/power/state To wake up, execute the following command on qemu monitor terminal: (qemu) system_wakeup Signed-off-by: Subrahmanya Lingappa <slingappa@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2024-12-06lib: utils: Add simple FDT based system suspend driver frameworkAnup Patel1-0/+26
The generic platform can have multiple system suspend drivers so add a simple FDT based system suspend driver framework. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2024-12-06lib/utils: reset: Add RPMI System Reset driverRahul Pathak1-0/+27
Add RPMI based driver for system reset and enable it in the generic platform defconfig Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2024-12-06lib/utils: Add RPMI messaging protocol and shared memory transport supportRahul Pathak2-0/+287
The RISC-V Platform Management Interface (RPMI) defines a messaging protocol and shared memory based transport for bi-directional communication with an on-chip or external microcontroller. To support RPMI in OpenSBI, add: 1) The RPMI messaging protocol defines and helper macros 2) A FDT mailbox driver for the RPMI shared memory transport Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com> Co-developed-by: Subrahmanya Lingappa <slingappa@ventanamicro.com> Signed-off-by: Subrahmanya Lingappa <slingappa@ventanamicro.com> Co-developed-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2024-12-06lib: utils/mailbox: Add simple FDT based mailbox frameworkAnup Patel1-0/+35
Add a simple FDT based mailbox framework which is built on top of the generic mailbox library. The phandle of FDT mailbox DT node is treated as the unique mailbox controller ID which is required by the generic mailbox library. The FDT based mailbox drivers will be probed on-demand from fdt_mailbox_request_chan() called by the mailbox client drivers. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2024-12-06lib: utils/mailbox: Add generic mailbox libraryAnup Patel1-0/+180
Add generic mailbox library which is independent of hardware description format. The OpenSBI platform support or mailbox drivers can register mailbox controller instances which can be discovered and used by different mailbox client drivers. Each mailbox controller instance has a unique ID which can be used by mailbox client drivers for find the mailbox controller instance. The mailbox client drivers will typically request a mailbox channel from the mailbox controller and use it to do data transfer with the remote end of mailbox channel. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
2024-11-28lib: utils/timer: Use fdt_driver for initializationSamuel Holland1-5/+1
The timer driver subsystem does not need any extra data, so it can use `struct fdt_driver` directly. The generic fdt_timer_init() performs a best-effort initialization of all matching DT nodes. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-28lib: utils/serial: Use fdt_driver for initializationSamuel Holland1-5/+1
The serial driver subsystem does not need any extra data, so it can use `struct fdt_driver` directly. The generic fdt_serial_init() first attempts to match the chosen stdout device, and upon failure matches the first available serial device in the DT. It is a fatal error if no such device is found. This matches the behavior of fdt_driver_init_one(). Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-28lib: utils/reset: Use fdt_driver for initializationSamuel Holland1-14/+1
The reset driver subsystem does not need any extra data, so it can use `struct fdt_driver` directly. The generic fdt_reset_init() performs a best-effort initialization of all matching DT nodes. Platform-specific logic expects exactly one DT node to match a single driver. This is accomplished by using fdt_driver_init_one() with a local list containing that one driver. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
generated by cgit v1.1 at 2026-01-09 09:12:59 +0000