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38 hoursMdePkg/IndustryStandard: Update EINJ information according to ACPI 6.5levi.yun1-2/+4
ACPI 6.5 specification updates EINJ revision to 0x02 and adds new Error Injection Actions - EINJV2_SET_ERROR_TYPE - EINJV2_GET_ERROR_TYPE This patches updates EINJ information based on ACPI 6.5 specification. Also, add missing Error Injection Actions too. Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Pierre Gondois <pierre.gondois@arm.com> Signed-off-by: levi.yun <yeoreum.yun@arm.com>
38 hoursMdePkg/IndustryStandard: Add GET_EXECUTE_OPERATION_TIMINGS definelevi.yun5-0/+5
GET_EXECUTE_OPERATION_TIMINGS Error Injection Actions was added from ACPI 6.1 specification. Update Error Injection Action with the ACPI spec. Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Pierre Gondois <pierre.gondois@arm.com> Signed-off-by: levi.yun <yeoreum.yun@arm.com>
38 hoursMdePkg/IndustryStandard: Add SET_ERROR_TYPE_WITH_ADDRESS definelevi.yun7-0/+7
SET_ERROR_TYPE_WITH_ADDRESS Error Injection Actions was added from ACPI 5.1 specification. Update Error Injection Action with the ACPI spec. Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Pierre Gondois <pierre.gondois@arm.com> Signed-off-by: levi.yun <yeoreum.yun@arm.com>
41 hoursMdePkg: Added support for Smbios 3.7.0 SpecShenbagadevi R1-1/+8
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4563 As per Smbios 3.7.0 spec, added CXL 3.0 support in Type 9, also added PMIC & RCD manufacturer ID and Revision information in Type17. Cc: Sainadh N <sainadhn@ami.com> Cc: Sundaresan S <sundaresans@ami.com> Cc: Srinivasan M <srinivasanm@ami.com> Cc: Ramesh R <rameshr@ami.com> Signed-off-by: Shenbagadevi R <shenbagadevir@ami.com> Reviewed-by: Gaoliming <gaoliming@byosoft.com.cn>
45 hoursMdePkg: Define SMBIOS Protocol header according IndustryStandardDongyan Qian1-0/+4
As the SMBIOS table types belong to the SMBIOS standard, they were moved from the SMBIOS IndustryStandard into the SMBIOS Protocol header with the EFI_-prefix. Filling in definitions facilitates consistent use of header files: EFI_SMBIOS_TYPE_TPM_DEVICE EFI_SMBIOS_TYPE_PROCESSOR_ADDITIONAL_INFORMATION EFI_SMBIOS_TYPE_FIRMWARE_INVENTORY_INFORMATION EFI_SMBIOS_TYPE_STRING_PROPERTY_INFORMATION Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Chao Li <lichao@loongson.cn> Signed-off-by: Dongyan Qian <qiandongyan@loongson.cn>
4 daysMdePkg/Library: Add RISCV64 support to BaseRngLibDhaval1-0/+10
The ratified RISC-V crypto scalar extensions provide entropy bits via the seed CSR, as exposed by the Zkr extension. The Zkr extension is ratified and provides 16 bits of entropy seed when reading the SEED CSR. Guarded by a RISCV64 Feature PCD, 64-bit random numbers can be accumulated from the `seed` CSR. This driver is based on the driver in the Linux kernel. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com> Co-authored-by: Tim Wawrzynczak <tim@rivosinc.com>
7 daysMdePkg/StmApi.h: Add SMM_REV_ID definition for STM headerMichael Kubacki1-0/+2
The `SMM_REV_ID` is defined in the STM specification: https://www.intel.com/content/www/us/en/content-details/671521/smi-transfer-monitor-stm-developer-or-user-guide.html?wapkw=stm, section 10.1.1. This adds it into the `StmApi.h` for potential STM usage. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
9 daysMdePkg: Adding EBBR EFI_CONFORMANCE_PROFILE_TABLE GUIDsSam Kaynor1-1/+11
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4352 Adding additional GUIDs for the EFI_CONFORMANCE_PROFILE_TABLE that are defined in the Embedded Base Boot Requirments (EBBR) Specification. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Sam Kaynor <Sam.Kaynor@arm.com>
9 daysMdePkg: Adding support for EFI_CONFORMANCE_PROFILE_TABLESam Kaynor1-0/+57
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4352 Adding support for EFI_CONFORMANCE_PROFILE_TABLE by adding an associated header file and relevant GUIDs to MdePkg.dec as defined in the UEFI 2.10 spec. This table is needed to address changes being made within ShellPkg. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Sam Kaynor <Sam.Kaynor@arm.com>
2024-07-04MdePkg/Tdx.h: Fix the order of NumVcpus and MaxVcpusXiaoyao Li1-1/+1
For TDCALL leaf TDG.VP.INFO, the bit 31:0 in R8 returns NUM_VCPUS and bit 63:32 in R8 returns MAX_VCPUS. Current struct TDCALL_INFO_RETURN_DATA defines them in wrong order. Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Min Xu <min.m.xu@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Laszlo Ersek <lersek@redhat.com>
2024-07-04MdePkg: Add AMD SEV features to PcdConfidentialComputingGuestAttrAlexey Kardashevskiy1-2/+13
PcdConfidentialComputingGuestAttr so far only contained an SEV mode bit but there are more other features which do not translate to levels such as DebugVirtualization or SecureTsc. Add the feature mask and the DebugVirtualization feature bit to the PCD. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Alexey Kardashevskiy <aik@amd.com> --- Changes: v4: * s/CCAttrFeatureAmdSevDebugSwap/CCAttrFeatureAmdSevEsDebugVirtualization/ v2: * expanded features mask * added type mask
2024-07-04MdePkg/Register/Amd: Define all bits from MSR_SEV_STATUS_REGISTERAlexey Kardashevskiy1-4/+91
For now we need DebugSwap but others are likely to be needed too. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Alexey Kardashevskiy <aik@amd.com> Changes: v5: * "rb" from Tom v4: * added more from April/2024 APM
2024-07-04MdePkg/Nvme.h: Add missing NVMe capability descriptionsMichael Kubacki1-6/+6
Most of the definitions in this file are currently well documented. This adds documentation for a few missing fields in the NVMe Controller Capabilities structure. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
2024-07-02MdePkg: UefiTcgPlatform.h updatesDionna Glaze1-4/+12
The TCG_Sp800_155_PlatformId_Event2 and 3 structures both list the platform model string twice, which is incorrect according to the TCG PC Client Platform Firmware Profile. Also add constant definitions for the locator types added in the December 2023 revision. Signed-off-by: Dionna Glaze <dionnaglaze@google.com>
2024-06-26MdePkg/ArchitecturalMsr.h: add #defines for MTRR cache typesGerd Hoffmann1-0/+7
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2024-06-20MdePkg: Check if compiler has __has_builtin before trying to use itRebecca Cran1-1/+1
When building AArch64 code, cpp gets run with the `-undef` flag which on Fedora 40 with gcc version 14.1.1 20240607 (Red Hat 14.1.1-5) causes __has_builtin to be undefined. When running the check for __builtin_unreachable in Base.h it causes an error "missing binary operator before token "("". Check that we have __has_builtin before trying to use it. Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
2024-06-19MdePkg/ArmLib: Drop obsolete library declarationsArd Biesheuvel2-41/+0
Drop obsolete library declarations that are no longer (and should not be) implemented in EDK2 or UEFI, given that they are specific to the secure world. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2024-06-18MdePkg/Include: Update AMD specification referencesPaul Grimes2-2/+2
Update AMD sepcification references (code comments) as part of a refactor of MSR definitions and SEV-SNP related defines, which aims to remove family-specific references (filename) as these defines are common to all modern EPYC Processors. Signed-off-by: Paul Grimes <paul.grimes@amd.com>
2024-06-18MdePkg/Include: Update Msr.h header guard definePaul Grimes1-2/+2
Update the Msr.h eader guard to comply with latest edk2 coding guidelines. This change is part of a refactor of MSR definitions and SEV-SNP related defines, which aims to remove family-specific references (filename) as these defines are common to all modern EPYC Processors. Signed-off-by: Paul Grimes <paul.grimes@amd.com>
2024-06-18MdePkg/Include: Remove deprecated AMD SEV-SNP header filePaul Grimes1-153/+0
Delete Fam17Msr.h as part of a refactor of MSR definitions and SEV-SNP related defines, which aims to remove family-specific references (filename) as these defines are common to all modern EPYC Processors. Signed-off-by: Paul Grimes <paul.grimes@amd.com>
2024-06-18MdePkg/Include: Update reference to SEV-SNP header filePaul Grimes1-1/+1
Update reference to SevSnpMsr.h as part of a refactor of MSR definitions and SEV-SNP related defines. Remove family-specific references (filename) as these defines are common to all modern EPYC Processors. Signed-off-by: Paul Grimes <paul.grimes@amd.com>
2024-06-18MdePkg/Include: Add AMD SEV-SNP header filePaul Grimes1-0/+153
Add SevSnpMsr.h as part of a refactor of MSR definitions and SEV-SNP related defines, which aims to remove family-specific references (filename) as these defines are common to all modern EPYC Processors. Signed-off-by: Paul Grimes <paul.grimes@amd.com>
2024-06-15ArmPkg,MdePkg: Move ArmPkg/Chipset/Aarch64[|Mmu].h to MdePkgPierre Gondois3-1/+339
Following the discussion at [1] and as the ArmLib relies on them, move ArmPkg/Chipset/Aarch64[|Mmu].h files to the MdePkg. Update the path to correctly include the moved files. [1] https://edk2.groups.io/g/devel/message/111566 Continuous-integration-options: PatchCheck.ignore-multi-package Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2024-06-15ArmPkg,MdePkg: Move ArmPkg/Chipset/ArmV7[|Mmu].h to MdePkgPierre Gondois3-1/+448
Following the discussion at [1] and as the ArmLib relies on them, move ArmPkg/Chipset/ArmV7[|Mmu].h files to the MdePkg. Update the path to correctly include the moved files. [1] https://edk2.groups.io/g/devel/message/111566 Continuous-integration-options: PatchCheck.ignore-multi-package Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2024-06-15ArmPkg,MdePkg: move ArmLib.h to MdePkgLeif Lindholm1-0/+829
Related to https://bugzilla.tianocore.org/show_bug.cgi?id=4121, but not resolving it. (Nearly?) all of ArmPkg describes industry standard behaviour, and hence according to general rules, ought to live in MdePkg. Addressing this will however be a substantial task. Take a first step by moving the ArmLib interface definition to MdePkg, as discussed in https://edk2.groups.io/g/devel/topic/patch_v5_2_6/102725178 Continuous-integration-options: PatchCheck.ignore-multi-package Cc: Pierre Gondois <pierre.gondois@arm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
2024-06-05MdePkg: Remove non-ASCII characters from header fileNeo Hsueh2-6/+6
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4775 Signed-off-by: Neo Hsueh <Hong-Chih.Hsueh@amd.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Cc: Jiangang He <jiangang.he@amd.com>
2024-06-05MdePkg: Add Ipmi Net Sensor Thresholds command defines.Aaron1-0/+46
Adding definitions for Ipmi Net Sensor Get/Set Thresholds commands and structures as found in Ipmi specification v2.0 Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
2024-05-30MdePkg: Add Ipmi definitions header file for OEM net functionNickle Wang1-0/+18
Add net function definitions for OEM/Non-IPMI group request and response Signed-off-by: Nickle Wang <nicklew@nvidia.com> Cc: Abner Chang <abner.chang@amd.com> Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com> Cc: Nick Ramirez <nramirez@nvidia.com> Reviewed-by: Abner Chang <abner.chang@amd.com>
2024-05-09MdePkg: Updated SpcrTable structure for Revision_4praveensankarn1-0/+32
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4656 In SPCR table, 4 structure members have been added newly as per SPCR table Revision 4, which has to be added in MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h. Signed-off-by: Praveen Sankar N <praveensankarn@ami.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Cc: Felix Polyudov <Felixp@ami.com> Cc: Srinivasan Mani <srinivasanm@ami.com> Cc: Sundaresan S <sundaresans@ami.com> Cc: Rabisha R <rabishar@ami.com>
2024-05-08MdePkg: Update Delayed Dispatch PPI as per PI 1.8 SpecSachin Ganesh1-1/+23
Added WaitOnEvent() function to EFI_DELAYTED_DISPATCH_PPI. Modified DispatchRegister() parameter list. Cc: Felix Polyudov <felixp@ami.com> Cc: Dhanaraj V <vdhanaraj@ami.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Sachin Ganesh <sachinganesh@ami.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2024-05-08MdePkg: Define Unaccepted Memory TypeSachin Ganesh2-18/+7
EFI_RESOURCE_MEMORY_UNACCEPTED has been officially defined in the PI 1.8 specification. So all temporary solutions have been replaced with the actual definition. Cc: Felix Polyudov <felixp@ami.com> Cc: Dhanaraj V <vdhanaraj@ami.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Sachin Ganesh <sachinganesh@ami.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2024-05-08MdePkg: Add new Resource Attributes defined in PI 1.8 SpecSachin Ganesh1-0/+2
Defined Encrypted and Special Purpose resource attributes as defined in PI 1.8 Specification Cc: Felix Polyudov <felixp@ami.com> Cc: Dhanaraj V <vdhanaraj@ami.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Sachin Ganesh <sachinganesh@ami.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2024-05-08MdePkg: Add definition for NVMe Over Fabric Device PathSachin Ganesh1-0/+22
In accordance with UEFI 2.10 Specification: Adding definition for NVMe Over Fabric (NVMe-oF) Device Path of Messaging Sub-Type. Cc: Felix Polyudov <felixp@ami.com> Cc: Dhanaraj V <vdhanaraj@ami.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Sachin Ganesh <sachinganesh@ami.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2024-05-08MdePkg/SpiConfiguration: Correct the definition spellingAbner Chang1-2/+2
Cc: Abner Chang <abner.chang@amd.com> Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com> Signed-off-by: Brit Chesley <brit.chesley@amd.com> Reviewed-by: Abner Chang <abner.chang@amd.com>
2024-05-07MdePkg: Add TcgSp800155Event3 type infoDionna Glaze1-1/+37
TCG PC Client Platform Firmware Profile 1.06 revision 52 of December 2023 added a new event signature and extended information about where a reference measurement document for the firmware can be found. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com> Signed-off-by: Dionna Glaze <dionnaglaze@google.com> Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
2024-04-30MdePkg: Add devAuthBoot GlobalVariableWenxing Hou2-2/+11
According to UEFI 2.10 spec 3.3 Globally Defined Variables section, add devAuthBoot GlobalVariable. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Wenxing Hou <wenxing.hou@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2024-04-30MdePkg: Add TCG PFP 1.06 support.Wenxing Hou2-3/+187
Add support for TCG PC Client Platform Firmware Profile Specification 1.06. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Wenxing Hou <wenxing.hou@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2024-04-30MdePkg: Add SPDM1.2 support.Wenxing Hou1-49/+1061
Update Spdm.h to support 1.2 new features, such as: Authentication and measurement. It wil be used in DeviceSecurity. The DeviceSecurity feature is from TCG PC Client Platform Firmware Profile Specification 1.06. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Wenxing Hou <wenxing.hou@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2024-04-29MdePkg: Add Cxl30.h into IndustryStandardFoster Nong2-1/+317
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4516 1) Add CXL 3.0 header file to comply with CXL 3.0 specification 2) CXL 3.0 header will embed Cxl20.h 3) Updated Cxl.h to point to 3.0 header file Signed-off-by: Foster Nong <foster.nong@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Ray Ni <ray.ni@intel.com> Cc: Chris Li <chrisli@os.amperecomputing.com> Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
2024-04-20MdePkg/Include: Add SPI NOR Flash JEDEC SFDP header fileabnchang1-0/+324
BZ#: 4472 Add definition of JEDEC Serial Flash Discoverable Parameters (SFDP) specification. https://www.jedec.org/standards-documents/docs/jesd216b Signed-off-by: Abner Chang <abner.chang@amd.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Abdul Lateef Attar <abdattar@amd.com> Cc: Brit Chesley <brit.chesley@amd.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Abdul Lateef Attar <abdattar@amd.com>
2024-04-20MdePkg/Include: Update definitions of SPI related header filesabnchang3-3/+35
BZ#: 4471 Update definitions according to PI spec 1.8 errata A Signed-off-by: Abner Chang <abner.chang@amd.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Abdul Lateef Attar <abdattar@amd.com> Cc: Brit Chesley <brit.chesley@amd.com> Reviewed-by: Abdul Lateef Attar <abdattar@amd.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2024-04-17MdePkg/BaseLib: Add a new VMGEXIT instruction invocation for SVSMTom Lendacky1-0/+39
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654 The SVSM specification relies on a specific register calling convention to hold the parameters that are associated with the SVSM request. The SVSM is invoked by requesting the hypervisor to run the VMPL0 VMSA of the guest using the GHCB MSR Protocol or a GHCB NAE event. Create a new version of the VMGEXIT instruction that will adhere to this calling convention and load the SVSM function arguments into the proper register before invoking the VMGEXIT instruction. On return, perform the atomic exchange on the SVSM call pending value as specified in the SVSM specification. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
2024-04-17MdePkg/Register/Amd: Define the SVSM related informationTom Lendacky4-2/+156
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654 The Secure VM Service Module specification defines the interfaces needed to allow multi-VMPL level execution of an SEV-SNP guest. Define the SVSM related structures for the SVSM Calling Area as well as the SVSM CAA MSR. The SVSM CAA MSR is an MSR register that is reserved for software use and will not be implemented in hardware. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
2024-04-17MdePkg: Avoid hardcoded value for number of Page State Change entriesTom Lendacky1-3/+4
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654 The SNP_PAGE_STATE_MAX_ENTRY is based on the number of entries that can fit in the GHCB shared buffer. As a result, the SNP_PAGE_STATE_CHANGE_INFO structure maps the full GHCB shared buffer based on the shared buffer size being 2032 bytes. Instead of using a hardcoded value for SNP_PAGE_STATE_MAX_ENTRY, use a build calculated value. Since the SNP_PAGE_STATE_CHANGE_INFO is used as a mapping, eliminate the hardcoded array size so that the structure can be used based on any size buffer. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
2024-04-17MdePkg: GHCB APIC ID retrieval support definitionsTom Lendacky1-1/+11
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654 When an SVSM is present, starting the APs requires knowledge of the APIC IDs. Create the definitions required to retrieve and hold the APIC ID information of all the vCPUs present in the guest. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
2024-04-16MdePkg/SmBios.h: Add New ProcessorUpgrade definitions for SMBIOS Type4Jason Lou1-1/+8
The patch adds new ProcessorUpgrade definitions for SMBIOS Type4 based on SMBIOS 3.8.0. Signed-off-by: Jason Lou <yun.lou@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Benny Lin <benny.lin@intel.com> Cc: Gua Guo <gua.guo@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn>
2024-04-15MdePkg: Update the comments of GetInformation functionQingyu1-1/+4
Refer to Uefi spec 2.10 section 11.11.2, add a new retval EFI_NOT_FOUND to EFI_ADAPTER_INFORMATION_PROTOCOL.GetInformation(). Reference: [mantis #1866] - GetInfo() of Adapter Information Protocol should have a provision for IHV to return no data. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Qingyu <qingyu.shang@intel.com> Signed-off-by: Gahan Saraiya <gahan.saraiya@intel.com>
2024-03-29MdePkg: Add UEFI 2.10 DeviceAuthenticationWenxing Hou1-0/+61
According to UEFI 2.10 spec 32.8.2 UEFI Device Signature Variable GUID and Variable Name section, add signature database for device authentication. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Wenxing Hou <wenxing.hou@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2024-03-13MdePkg: Update ReceiveData and SendData function descriptionQingyu Shang1-2/+6
Refer to UEFI Spec 2.10 section 13.14, update the parameter 'MediaId' description for EFI_STORAGE_SECURITY_COMMAND_PROTOCOL function ReceiveData and SendData. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Qingyu Shang <qingyu.shang@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2024-03-04MdePkg/SmBios.h: Add New ProcessorFamily definitions for SMBIOS Type4Jason Lou1-3/+11
The patch adds new ProcessorFamily definitions for SMBIOS Type4 based on SMBIOS 3.8.0. Signed-off-by: Jason Lou <yun.lou@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Benny Lin <benny.lin@intel.com> Cc: Gua Guo <gua.guo@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn>