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44 hoursMdePkg: IORT header update for IORT Rev E.f specAbhishek Mainkar1-2/+3
The IO Remapping Table, Platform Design Document, Revision E.f, April 2024 (https://developer.arm.com/documentation/den0049/ef/) added CANWBS Memory access flag. Therefore, update the IORT header file to add support for CANWBS Memory access flag. Signed-off-by: Abhishek Mainkar <abmainkar@nvidia.com>
46 hoursMdePkg: Update HEST Revision As 2Herman Li1-1/+1
This modification come from ACPI 6.5 spec. Besides, Starting with revision 2 of HEST, the Error Source Structures must be sorted in Type ascending order for Error Source Structure Types of less than 12. Signed-off-by: Herman Li <herman.li@intel.com>
6 daysMdePkg: Move MEMORY_TYPE_* Defines to EFI_MEMORY_TYPE EnumDmitry Antipov1-1/+16
Per TCBZ2372, clang on Linux emits a warning if an enum-typed variable is compared with a constant outside of the range of the enum. Such comparisons are performed in multiple locations in DXE core on variables of type EFI_MEMORY_TYPE. This patch moves the OEM and OS reserved types into the EFI_MEMORY_TYPE enum itself to resolve this issue and improve readability. This commit does this for the MdePkg copy of this enum. Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
2024-07-17MdePkg/BaseLib: Optimize LOONGARCH64 csr usageDongyan Qian2-9/+7
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4812 When the Select is out of support, use method break exception instead of method return -1, avoid unknown errors caused by untimely detection. Cc: Chao Li <lichao@loongson.cn> Signed-off-by: Dongyan Qian <qiandongyan@loongson.cn>
2024-07-17MdePkg/IndustryStandard: Update EINJ information according to ACPI 6.5levi.yun1-2/+4
ACPI 6.5 specification updates EINJ revision to 0x02 and adds new Error Injection Actions - EINJV2_SET_ERROR_TYPE - EINJV2_GET_ERROR_TYPE This patches updates EINJ information based on ACPI 6.5 specification. Also, add missing Error Injection Actions too. Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Pierre Gondois <pierre.gondois@arm.com> Signed-off-by: levi.yun <yeoreum.yun@arm.com>
2024-07-17MdePkg/IndustryStandard: Add GET_EXECUTE_OPERATION_TIMINGS definelevi.yun5-0/+5
GET_EXECUTE_OPERATION_TIMINGS Error Injection Actions was added from ACPI 6.1 specification. Update Error Injection Action with the ACPI spec. Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Pierre Gondois <pierre.gondois@arm.com> Signed-off-by: levi.yun <yeoreum.yun@arm.com>
2024-07-17MdePkg/IndustryStandard: Add SET_ERROR_TYPE_WITH_ADDRESS definelevi.yun7-0/+7
SET_ERROR_TYPE_WITH_ADDRESS Error Injection Actions was added from ACPI 5.1 specification. Update Error Injection Action with the ACPI spec. Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Pierre Gondois <pierre.gondois@arm.com> Signed-off-by: levi.yun <yeoreum.yun@arm.com>
2024-07-17MdePkg: Added support for Smbios 3.7.0 SpecShenbagadevi R1-1/+8
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4563 As per Smbios 3.7.0 spec, added CXL 3.0 support in Type 9, also added PMIC & RCD manufacturer ID and Revision information in Type17. Cc: Sainadh N <sainadhn@ami.com> Cc: Sundaresan S <sundaresans@ami.com> Cc: Srinivasan M <srinivasanm@ami.com> Cc: Ramesh R <rameshr@ami.com> Signed-off-by: Shenbagadevi R <shenbagadevir@ami.com> Reviewed-by: Gaoliming <gaoliming@byosoft.com.cn>
2024-07-17MdePkg: Define SMBIOS Protocol header according IndustryStandardDongyan Qian1-0/+4
As the SMBIOS table types belong to the SMBIOS standard, they were moved from the SMBIOS IndustryStandard into the SMBIOS Protocol header with the EFI_-prefix. Filling in definitions facilitates consistent use of header files: EFI_SMBIOS_TYPE_TPM_DEVICE EFI_SMBIOS_TYPE_PROCESSOR_ADDITIONAL_INFORMATION EFI_SMBIOS_TYPE_FIRMWARE_INVENTORY_INFORMATION EFI_SMBIOS_TYPE_STRING_PROPERTY_INFORMATION Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Chao Li <lichao@loongson.cn> Signed-off-by: Dongyan Qian <qiandongyan@loongson.cn>
2024-07-16MdePkg/UefiDebugLibDebugPortProtocol: ExitBootServicesCallback() staticMichael Kubacki1-2/+3
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3083 Since this is a library, make the function ExitBootServicesCallback() STATIC to prevent the likelihood that it collides with other symbols. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
2024-07-15MdePkg/Library: Add RISCV64 support to BaseRngLibDhaval5-0/+316
The ratified RISC-V crypto scalar extensions provide entropy bits via the seed CSR, as exposed by the Zkr extension. The Zkr extension is ratified and provides 16 bits of entropy seed when reading the SEED CSR. Guarded by a RISCV64 Feature PCD, 64-bit random numbers can be accumulated from the `seed` CSR. This driver is based on the driver in the Linux kernel. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com> Co-authored-by: Tim Wawrzynczak <tim@rivosinc.com>
2024-07-12MdePkg/StmApi.h: Add SMM_REV_ID definition for STM headerMichael Kubacki1-0/+2
The `SMM_REV_ID` is defined in the STM specification: https://www.intel.com/content/www/us/en/content-details/671521/smi-transfer-monitor-stm-developer-or-user-guide.html?wapkw=stm, section 10.1.1. This adds it into the `StmApi.h` for potential STM usage. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
2024-07-10MdePkg: Adding EBBR EFI_CONFORMANCE_PROFILE_TABLE GUIDsSam Kaynor2-1/+17
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4352 Adding additional GUIDs for the EFI_CONFORMANCE_PROFILE_TABLE that are defined in the Embedded Base Boot Requirments (EBBR) Specification. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Sam Kaynor <Sam.Kaynor@arm.com>
2024-07-10MdePkg: Adding support for EFI_CONFORMANCE_PROFILE_TABLESam Kaynor2-0/+61
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4352 Adding support for EFI_CONFORMANCE_PROFILE_TABLE by adding an associated header file and relevant GUIDs to MdePkg.dec as defined in the UEFI 2.10 spec. This table is needed to address changes being made within ShellPkg. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Sam Kaynor <Sam.Kaynor@arm.com>
2024-07-05MdePkg/StandaloneMmServicesTableLib: Support MM_CORE_STANDALONEJiaxin Wu1-1/+1
Support the module type for MM_CORE_STANDALONE Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
2024-07-04MdePkg/Tdx.h: Fix the order of NumVcpus and MaxVcpusXiaoyao Li1-1/+1
For TDCALL leaf TDG.VP.INFO, the bit 31:0 in R8 returns NUM_VCPUS and bit 63:32 in R8 returns MAX_VCPUS. Current struct TDCALL_INFO_RETURN_DATA defines them in wrong order. Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Min Xu <min.m.xu@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Laszlo Ersek <lersek@redhat.com>
2024-07-04MdePkg: Add AMD SEV features to PcdConfidentialComputingGuestAttrAlexey Kardashevskiy1-2/+13
PcdConfidentialComputingGuestAttr so far only contained an SEV mode bit but there are more other features which do not translate to levels such as DebugVirtualization or SecureTsc. Add the feature mask and the DebugVirtualization feature bit to the PCD. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Alexey Kardashevskiy <aik@amd.com> --- Changes: v4: * s/CCAttrFeatureAmdSevDebugSwap/CCAttrFeatureAmdSevEsDebugVirtualization/ v2: * expanded features mask * added type mask
2024-07-04MdePkg/Register/Amd: Define all bits from MSR_SEV_STATUS_REGISTERAlexey Kardashevskiy1-4/+91
For now we need DebugSwap but others are likely to be needed too. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Alexey Kardashevskiy <aik@amd.com> Changes: v5: * "rb" from Tom v4: * added more from April/2024 APM
2024-07-04MdePkg/Nvme.h: Add missing NVMe capability descriptionsMichael Kubacki1-6/+6
Most of the definitions in this file are currently well documented. This adds documentation for a few missing fields in the NVMe Controller Capabilities structure. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
2024-07-02MdePkg: UefiTcgPlatform.h updatesDionna Glaze1-4/+12
The TCG_Sp800_155_PlatformId_Event2 and 3 structures both list the platform model string twice, which is incorrect according to the TCG PC Client Platform Firmware Profile. Also add constant definitions for the locator types added in the December 2023 revision. Signed-off-by: Dionna Glaze <dionnaglaze@google.com>
2024-06-26MdePkg/ArchitecturalMsr.h: add #defines for MTRR cache typesGerd Hoffmann1-0/+7
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2024-06-26MdePkg/BaseLib: Fix an instruction write width error in LoongArch64Dongyan Qian1-1/+1
Cpucfg fetch is a 32-bit register, and AsmCpucfg's function declaration is a 32-bit address storage operation in BaseLib.h, So, fix it by replacing stptr.d with stptr.w instrcution. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4797 Cc: Chao Li <lichao@loongson.cn> Signed-off-by: Dongyan Qian <qiandongyan@loongson.cn> Co-authored-by: Chao Li <lichao@loongson.cn>
2024-06-20MdePkg: Check if compiler has __has_builtin before trying to use itRebecca Cran1-1/+1
When building AArch64 code, cpp gets run with the `-undef` flag which on Fedora 40 with gcc version 14.1.1 20240607 (Red Hat 14.1.1-5) causes __has_builtin to be undefined. When running the check for __builtin_unreachable in Base.h it causes an error "missing binary operator before token "("". Check that we have __has_builtin before trying to use it. Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
2024-06-19MdePkg/ArmLib: Drop obsolete library declarationsArd Biesheuvel2-41/+0
Drop obsolete library declarations that are no longer (and should not be) implemented in EDK2 or UEFI, given that they are specific to the secure world. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2024-06-18MdePkg/Include: Update AMD specification referencesPaul Grimes2-2/+2
Update AMD sepcification references (code comments) as part of a refactor of MSR definitions and SEV-SNP related defines, which aims to remove family-specific references (filename) as these defines are common to all modern EPYC Processors. Signed-off-by: Paul Grimes <paul.grimes@amd.com>
2024-06-18MdePkg/Include: Update Msr.h header guard definePaul Grimes1-2/+2
Update the Msr.h eader guard to comply with latest edk2 coding guidelines. This change is part of a refactor of MSR definitions and SEV-SNP related defines, which aims to remove family-specific references (filename) as these defines are common to all modern EPYC Processors. Signed-off-by: Paul Grimes <paul.grimes@amd.com>
2024-06-18MdePkg/Include: Remove deprecated AMD SEV-SNP header filePaul Grimes1-153/+0
Delete Fam17Msr.h as part of a refactor of MSR definitions and SEV-SNP related defines, which aims to remove family-specific references (filename) as these defines are common to all modern EPYC Processors. Signed-off-by: Paul Grimes <paul.grimes@amd.com>
2024-06-18MdePkg/Include: Update reference to SEV-SNP header filePaul Grimes1-1/+1
Update reference to SevSnpMsr.h as part of a refactor of MSR definitions and SEV-SNP related defines. Remove family-specific references (filename) as these defines are common to all modern EPYC Processors. Signed-off-by: Paul Grimes <paul.grimes@amd.com>
2024-06-18MdePkg/Include: Add AMD SEV-SNP header filePaul Grimes1-0/+153
Add SevSnpMsr.h as part of a refactor of MSR definitions and SEV-SNP related defines, which aims to remove family-specific references (filename) as these defines are common to all modern EPYC Processors. Signed-off-by: Paul Grimes <paul.grimes@amd.com>
2024-06-15ArmPkg,MdePkg: Move ArmPkg/Chipset/Aarch64[|Mmu].h to MdePkgPierre Gondois3-1/+339
Following the discussion at [1] and as the ArmLib relies on them, move ArmPkg/Chipset/Aarch64[|Mmu].h files to the MdePkg. Update the path to correctly include the moved files. [1] https://edk2.groups.io/g/devel/message/111566 Continuous-integration-options: PatchCheck.ignore-multi-package Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2024-06-15ArmPkg,MdePkg: Move ArmPkg/Chipset/ArmV7[|Mmu].h to MdePkgPierre Gondois3-1/+448
Following the discussion at [1] and as the ArmLib relies on them, move ArmPkg/Chipset/ArmV7[|Mmu].h files to the MdePkg. Update the path to correctly include the moved files. [1] https://edk2.groups.io/g/devel/message/111566 Continuous-integration-options: PatchCheck.ignore-multi-package Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
2024-06-15ArmPkg,MdePkg: move ArmLib.h to MdePkgLeif Lindholm2-0/+834
Related to https://bugzilla.tianocore.org/show_bug.cgi?id=4121, but not resolving it. (Nearly?) all of ArmPkg describes industry standard behaviour, and hence according to general rules, ought to live in MdePkg. Addressing this will however be a substantial task. Take a first step by moving the ArmLib interface definition to MdePkg, as discussed in https://edk2.groups.io/g/devel/topic/patch_v5_2_6/102725178 Continuous-integration-options: PatchCheck.ignore-multi-package Cc: Pierre Gondois <pierre.gondois@arm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
2024-06-14MdePkg/X86UnitTestHost: set rdrand cpuid bitGerd Hoffmann1-1/+10
Set the rdrand feature bit when faking cpuid for host test cases. Needed to make the CryptoPkg test cases work. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2024-06-13MdePkg/BaseRngLib: Add a smoketest for RDRAND and check CPUIDPedro Falcato1-8/+91
RDRAND has notoriously been broken many times over its lifespan. Add a smoketest to RDRAND, in order to better sniff out potential security concerns. Also add a proper CPUID test in order to support older CPUs which may not have it; it was previously being tested but then promptly ignored. Testing algorithm inspired by linux's arch/x86/kernel/cpu/rdrand.c :x86_init_rdrand() per commit 049f9ae9.. Many thanks to Jason Donenfeld for relicensing his linux RDRAND detection code to MIT and the public domain. >On Tue, Nov 22, 2022 at 2:21 PM Jason A. Donenfeld <Jason@zx2c4.com> wrote: <..> > I (re)wrote that function in Linux. I hereby relicense it as MIT, and > also place it into public domain. Do with it what you will now. > > Jason BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4163 Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Jason A. Donenfeld <Jason@zx2c4.com>
2024-06-12MdePkg/BaseLib: Let CpuDeadLoop() be breakable in debuggerRay Ni1-2/+4
Starting from certain version of Visual Studio C compiler (I don’t have the exact version. I am using VS2019), CpuDeadLoop is optimized quite well by compiler. The compiler does not generate instructions that jump out of the loop when the "Index" is non-zero. It becomes harder/impossible for developers to break out of the dead-loop in debugger. The new version of CpuDeadLoop() compares a volatile global to a volatile local. This forces 2 reads and a comparison on every loop iteration. The local variable can be set to 1 to exit the loop without modifying the global variable. Using VS2019 with max opt enabled, The dead-loop can be exit by setting Index to 1 in a debugger. Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
2024-06-05MdePkg: Remove non-ASCII characters from header fileNeo Hsueh2-6/+6
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4775 Signed-off-by: Neo Hsueh <Hong-Chih.Hsueh@amd.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Cc: Jiangang He <jiangang.he@amd.com>
2024-06-05MdePkg: Add Ipmi Net Sensor Thresholds command defines.Aaron1-0/+46
Adding definitions for Ipmi Net Sensor Get/Set Thresholds commands and structures as found in Ipmi specification v2.0 Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
2024-05-30MdePkg: Add Ipmi definitions header file for OEM net functionNickle Wang1-0/+18
Add net function definitions for OEM/Non-IPMI group request and response Signed-off-by: Nickle Wang <nicklew@nvidia.com> Cc: Abner Chang <abner.chang@amd.com> Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com> Cc: Nick Ramirez <nramirez@nvidia.com> Reviewed-by: Abner Chang <abner.chang@amd.com>
2024-05-24MdePkg/BaseRngLib AARCH64: Remove overzealous ASSERT()Ard Biesheuvel1-1/+0
BaseRngLib on AARCH64 will discover whether or not RNDR instructions are supported, by inspecting the ISAR0 identification register, and setting a global boolean accordingly. This boolean is used in subsequent execution to decide whether or not to issue the instruction. The same discovery code also ASSERT()s that RNDR instructions are implemented, which is unnecessary, and breaks execution on systems that incorporate the library but don't implement the instruction (or fail to expose it to the exception level that the firmware executes at). So drop the ASSERT(). Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Committed-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2024-05-24MdePkg: Add MockHash2 Protocol for testingDoug Flick2-0/+94
This commit adds a new MockHash2 protocol to the MdePkg. This allows the unit tests to pick up the new protocol and use it for testing. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2024-05-24MdePkg: Adds Protocol for MockRngDoug Flick2-0/+69
This patch adds a protocol for MockRng. This protocol is used to mock the Rng protocol for testing purposes. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2024-05-24MdePkg: Add MockUefiBootServicesTableLibDoug Flick4-0/+180
This commit adds a mock library for UefiBootServicesTableLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2024-05-15MdePkg/BaseLib: Fix AARCH64 compilation errorShun Cheng Liu2-0/+2
Declare InternalAssertJumpBuffer as EXTERN Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Shun Cheng Liu <adam.liu@tw.synaptics.com> Reviewed-by: levi.yun <yeoreum.yun@arm.com>
2024-05-10MdePkg: Add MmUnblockMemoryLib to MdeLibs.dscRay Ni1-1/+2
MdeLibs.dsc.inc included some default libraries provided by MdePkg. Platform can include MdeLibs.dsc.inc file to avoid some potential incompatible changes to platform dsc file in future. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Yuanhao Xie <yuanhao.xie@intel.com> Signed-off-by: Hongbin1 Zhang <hongbin1.zhang@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
2024-05-09MdePkg: Updated SpcrTable structure for Revision_4praveensankarn1-0/+32
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4656 In SPCR table, 4 structure members have been added newly as per SPCR table Revision 4, which has to be added in MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h. Signed-off-by: Praveen Sankar N <praveensankarn@ami.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Cc: Felix Polyudov <Felixp@ami.com> Cc: Srinivasan Mani <srinivasanm@ami.com> Cc: Sundaresan S <sundaresans@ami.com> Cc: Rabisha R <rabishar@ami.com>
2024-05-08MdePkg: Update Delayed Dispatch PPI as per PI 1.8 SpecSachin Ganesh1-1/+23
Added WaitOnEvent() function to EFI_DELAYTED_DISPATCH_PPI. Modified DispatchRegister() parameter list. Cc: Felix Polyudov <felixp@ami.com> Cc: Dhanaraj V <vdhanaraj@ami.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Sachin Ganesh <sachinganesh@ami.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2024-05-08MdePkg: Define Unaccepted Memory TypeSachin Ganesh2-18/+7
EFI_RESOURCE_MEMORY_UNACCEPTED has been officially defined in the PI 1.8 specification. So all temporary solutions have been replaced with the actual definition. Cc: Felix Polyudov <felixp@ami.com> Cc: Dhanaraj V <vdhanaraj@ami.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Sachin Ganesh <sachinganesh@ami.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2024-05-08MdePkg: Add new Resource Attributes defined in PI 1.8 SpecSachin Ganesh1-0/+2
Defined Encrypted and Special Purpose resource attributes as defined in PI 1.8 Specification Cc: Felix Polyudov <felixp@ami.com> Cc: Dhanaraj V <vdhanaraj@ami.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Sachin Ganesh <sachinganesh@ami.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2024-05-08MdePkg: Add definition for NVMe Over Fabric Device PathSachin Ganesh1-0/+22
In accordance with UEFI 2.10 Specification: Adding definition for NVMe Over Fabric (NVMe-oF) Device Path of Messaging Sub-Type. Cc: Felix Polyudov <felixp@ami.com> Cc: Dhanaraj V <vdhanaraj@ami.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Sachin Ganesh <sachinganesh@ami.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2024-05-08MdePkg/SpiConfiguration: Correct the definition spellingAbner Chang1-2/+2
Cc: Abner Chang <abner.chang@amd.com> Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com> Signed-off-by: Brit Chesley <brit.chesley@amd.com> Reviewed-by: Abner Chang <abner.chang@amd.com>
generated by cgit v1.1 at 2024-08-01 01:27:27 +0000