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Author
Files
Lines
2021-04-30
target/arm: Enforce alignment for sve LD1R
Richard Henderson
1
-1
/
+1
2021-04-30
target/arm: Enforce alignment for aa64 vector LDn/STn (single)
Richard Henderson
1
-4
/
+5
2021-04-30
target/arm: Enforce alignment for aa64 vector LDn/STn (multiple)
Richard Henderson
1
-4
/
+11
2021-04-30
target/arm: Use MemOp for size + endian in aa64 vector ld/st
Richard Henderson
1
-10
/
+10
2021-04-30
target/arm: Enforce alignment for aa64 load-acq/store-rel
Richard Henderson
1
-9
/
+14
2021-04-30
target/arm: Use finalize_memop for aa64 fpr load/store
Richard Henderson
1
-16
/
+26
2021-04-30
target/arm: Use finalize_memop for aa64 gpr load/store
Richard Henderson
1
-45
/
+33
2021-04-30
target/arm: Enforce alignment for VLDn/VSTn (single)
Richard Henderson
1
-6
/
+42
2021-04-30
target/arm: Enforce alignment for VLDn/VSTn (multiple)
Richard Henderson
1
-5
/
+22
2021-04-30
target/arm: Enforce alignment for VLDn (all lanes)
Richard Henderson
3
-9
/
+44
2021-04-30
target/arm: Enforce alignment for VLDR/VSTR
Richard Henderson
1
-6
/
+6
2021-04-30
target/arm: Enforce alignment for VLDM/VSTM
Richard Henderson
1
-4
/
+4
2021-04-30
target/arm: Enforce alignment for SRS
Richard Henderson
1
-2
/
+2
2021-04-30
target/arm: Enforce alignment for RFE
Richard Henderson
1
-2
/
+2
2021-04-30
target/arm: Enforce alignment for LDM/STM
Richard Henderson
1
-2
/
+2
2021-04-30
target/arm: Enforce alignment for LDA/LDAH/STL/STLH
Richard Henderson
1
-2
/
+2
2021-04-30
target/arm: Enforce word alignment for LDRD/STRD
Richard Henderson
1
-8
/
+8
2021-04-30
target/arm: Adjust gen_aa32_{ld, st}_i64 for align+endianness
Richard Henderson
2
-35
/
+49
2021-04-30
target/arm: Fix SCTLR_B test for TCGv_i64 load/store
Richard Henderson
1
-2
/
+2
2021-04-30
target/arm: Merge gen_aa32_frob64 into gen_aa32_ld_i64
Richard Henderson
1
-20
/
+15
2021-04-30
target/arm: Adjust gen_aa32_{ld, st}_i32 for align+endianness
Richard Henderson
3
-52
/
+77
2021-04-30
target/arm: Add ALIGN_MEM to TBFLAG_ANY
Richard Henderson
5
-6
/
+25
2021-04-30
target/arm: Move TBFLAG_ANY bits to the bottom
Richard Henderson
1
-7
/
+7
2021-04-30
target/arm: Move TBFLAG_AM32 bits to the top
Richard Henderson
1
-21
/
+21
2021-04-30
target/arm: Move mode specific TB flags to tb->cs_base
Richard Henderson
3
-26
/
+35
2021-04-30
target/arm: Introduce CPUARMTBFlags
Richard Henderson
5
-37
/
+57
2021-04-30
target/arm: Add wrapper macros for accessing tbflags
Richard Henderson
5
-92
/
+101
2021-04-30
target/arm: Rename TBFLAG_ANY, PSTATE_SS
Richard Henderson
4
-5
/
+5
2021-04-30
target/arm: Rename TBFLAG_A32, SCTLR_B
Richard Henderson
3
-3
/
+3
2021-04-30
target/arm: Fix decode of align in VLDST_single
Richard Henderson
2
-4
/
+4
2021-04-30
target/arm: Remove log2_esize parameter to gen_mte_checkN
Richard Henderson
3
-11
/
+10
2021-04-30
target/arm: Simplify sve mte checking
Richard Henderson
1
-58
/
+26
2021-04-30
target/arm: Rename mte_probe1 to mte_probe
Richard Henderson
3
-7
/
+7
2021-04-30
target/arm: Merge mte_check1, mte_checkN
Richard Henderson
5
-38
/
+14
2021-04-30
target/arm: Replace MTEDESC ESIZE+TSIZE with SIZEM1
Richard Henderson
4
-18
/
+14
2021-04-30
target/arm: Fix unaligned checks for mte_check1, mte_probe1
Richard Henderson
1
-74
/
+35
2021-04-30
target/arm: Split out mte_probe_int
Richard Henderson
1
-12
/
+40
2021-04-30
target/arm: Fix mte_checkN
Richard Henderson
1
-22
/
+18
2021-04-30
target/arm: Make Thumb store insns UNDEF for Rn==1111
Peter Maydell
1
-0
/
+16
2021-04-23
target/s390x: fix s390_probe_access to check PAGE_WRITE_ORG for writeability
Alex Bennée
1
-1
/
+1
2021-04-20
target/mips/rel6_translate: Change license to GNU LGPL v2.1 (or later)
Philippe Mathieu-Daudé
1
-5
/
+4
2021-04-17
target/arm: drop CF_LAST_IO/dc->condjump check
Alex Bennée
1
-5
/
+0
2021-04-13
target/mips: Fix TCG temporary leak in gen_cache_operation()
Philippe Mathieu-Daudé
1
-0
/
+2
2021-04-12
target/arm: Check PAGE_WRITE_ORG for MTE writeability
Richard Henderson
1
-1
/
+1
2021-04-09
i386: Add missing cpu feature bits in EPYC-Rome model
Babu Moger
1
-0
/
+12
2021-04-06
Revert "target/arm: Make number of counters in PMCR follow the CPU"
Peter Maydell
5
-28
/
+12
2021-04-05
target/alpha: fix icount handling for timer instructions
Pavel Dovgalyuk
1
-2
/
+7
2021-04-04
Merge remote-tracking branch 'remotes/xtensa/tags/20210403-xtensa' into staging
Peter Maydell
2
-12
/
+5
2021-04-03
target/xtensa: make xtensa_modules static on import
Max Filippov
1
-0
/
+1
2021-04-03
target/xtensa: fix meson.build rule for xtensa cores
Max Filippov
2
-12
/
+4
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