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author | Richard Henderson <richard.henderson@linaro.org> | 2021-04-19 13:22:42 -0700 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2021-04-30 11:16:50 +0100 |
commit | 824efdf5256399c9830941ddd78c28e3aa4618d8 (patch) | |
tree | 8d4f4f2330bd34cbf817fb8386c7838c409bb0cb /target | |
parent | 4d753eb5fb03ee7bc71ecd453a650b7546be81da (diff) | |
download | qemu-824efdf5256399c9830941ddd78c28e3aa4618d8.zip qemu-824efdf5256399c9830941ddd78c28e3aa4618d8.tar.gz qemu-824efdf5256399c9830941ddd78c28e3aa4618d8.tar.bz2 |
target/arm: Enforce alignment for LDA/LDAH/STL/STLH
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210419202257.161730-17-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
-rw-r--r-- | target/arm/translate.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c index 4b0dba9..f5a214e 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -6936,7 +6936,7 @@ static bool op_stl(DisasContext *s, arg_STL *a, MemOp mop) addr = load_reg(s, a->rn); tmp = load_reg(s, a->rt); tcg_gen_mb(TCG_MO_ALL | TCG_BAR_STRL); - gen_aa32_st_i32(s, tmp, addr, get_mem_index(s), mop); + gen_aa32_st_i32(s, tmp, addr, get_mem_index(s), mop | MO_ALIGN); disas_set_da_iss(s, mop, a->rt | ISSIsAcqRel | ISSIsWrite); tcg_temp_free_i32(tmp); @@ -7092,7 +7092,7 @@ static bool op_lda(DisasContext *s, arg_LDA *a, MemOp mop) addr = load_reg(s, a->rn); tmp = tcg_temp_new_i32(); - gen_aa32_ld_i32(s, tmp, addr, get_mem_index(s), mop); + gen_aa32_ld_i32(s, tmp, addr, get_mem_index(s), mop | MO_ALIGN); disas_set_da_iss(s, mop, a->rt | ISSIsAcqRel); tcg_temp_free_i32(addr); |