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AgeCommit message (Expand)AuthorFilesLines
2021-05-01Hexagon (target/hexagon) cleanup reg_field_info definitionTaylor Simpson2-4/+3
2021-05-01Hexagon (target/hexagon) cleanup ternary operators in semanticsTaylor Simpson1-6/+6
2021-05-01Hexagon (target/hexagon) use softfloat for float-to-int conversionsTaylor Simpson6-259/+136
2021-05-01Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbnTaylor Simpson1-17/+11
2021-05-01Hexagon (target/hexagon) use softfloat default NaN and tininessTaylor Simpson2-47/+5
2021-05-01Hexagon (target/hexagon) change type of softfloat_roundingmodesTaylor Simpson1-1/+1
2021-05-01Hexagon (target/hexagon) remove unused carry_from_add64 functionTaylor Simpson3-16/+0
2021-05-01Hexagon (target/hexagon) change variables from int to bool when appropriateTaylor Simpson6-59/+60
2021-05-01Hexagon (target/hexagon) decide if pred has been written at TCG gen timeTaylor Simpson4-10/+25
2021-05-01Hexagon (target/hexagon) properly generate TB end for DISAS_NORETURNTaylor Simpson2-32/+33
2021-05-01Hexagon (target/hexagon) use env_archcpu and env_cpuTaylor Simpson4-9/+4
2021-05-01Hexagon (target/hexagon) remove unnecessary inline directivesTaylor Simpson5-47/+46
2021-05-01Hexagon (target/hexagon) cleanup gen_log_predicated_reg_write_pairTaylor Simpson1-14/+13
2021-05-01Hexagon (target/hexagon) TCG generation cleanupTaylor Simpson1-5/+9
2021-05-01target/hexagon: remove unnecessary semicolonsTaylor Simpson1-2/+2
2021-05-01target/hexagon: fix typo in commentTaylor Simpson1-1/+1
2021-05-01target/hexagon: Change DECODE_MAPPED_REG operand name to OPNUMTaylor Simpson1-2/+2
2021-05-01target/hexagon: remove unnecessary checks in find_iclass_slotsTaylor Simpson1-4/+0
2021-05-01target/hexagon: translation changesTaylor Simpson1-17/+9
2021-04-30target/arm: Enforce alignment for sve LD1RRichard Henderson1-1/+1
2021-04-30target/arm: Enforce alignment for aa64 vector LDn/STn (single)Richard Henderson1-4/+5
2021-04-30target/arm: Enforce alignment for aa64 vector LDn/STn (multiple)Richard Henderson1-4/+11
2021-04-30target/arm: Use MemOp for size + endian in aa64 vector ld/stRichard Henderson1-10/+10
2021-04-30target/arm: Enforce alignment for aa64 load-acq/store-relRichard Henderson1-9/+14
2021-04-30target/arm: Use finalize_memop for aa64 fpr load/storeRichard Henderson1-16/+26
2021-04-30target/arm: Use finalize_memop for aa64 gpr load/storeRichard Henderson1-45/+33
2021-04-30target/arm: Enforce alignment for VLDn/VSTn (single)Richard Henderson1-6/+42
2021-04-30target/arm: Enforce alignment for VLDn/VSTn (multiple)Richard Henderson1-5/+22
2021-04-30target/arm: Enforce alignment for VLDn (all lanes)Richard Henderson3-9/+44
2021-04-30target/arm: Enforce alignment for VLDR/VSTRRichard Henderson1-6/+6
2021-04-30target/arm: Enforce alignment for VLDM/VSTMRichard Henderson1-4/+4
2021-04-30target/arm: Enforce alignment for SRSRichard Henderson1-2/+2
2021-04-30target/arm: Enforce alignment for RFERichard Henderson1-2/+2
2021-04-30target/arm: Enforce alignment for LDM/STMRichard Henderson1-2/+2
2021-04-30target/arm: Enforce alignment for LDA/LDAH/STL/STLHRichard Henderson1-2/+2
2021-04-30target/arm: Enforce word alignment for LDRD/STRDRichard Henderson1-8/+8
2021-04-30target/arm: Adjust gen_aa32_{ld, st}_i64 for align+endiannessRichard Henderson2-35/+49
2021-04-30target/arm: Fix SCTLR_B test for TCGv_i64 load/storeRichard Henderson1-2/+2
2021-04-30target/arm: Merge gen_aa32_frob64 into gen_aa32_ld_i64Richard Henderson1-20/+15
2021-04-30target/arm: Adjust gen_aa32_{ld, st}_i32 for align+endiannessRichard Henderson3-52/+77
2021-04-30target/arm: Add ALIGN_MEM to TBFLAG_ANYRichard Henderson5-6/+25
2021-04-30target/arm: Move TBFLAG_ANY bits to the bottomRichard Henderson1-7/+7
2021-04-30target/arm: Move TBFLAG_AM32 bits to the topRichard Henderson1-21/+21
2021-04-30target/arm: Move mode specific TB flags to tb->cs_baseRichard Henderson3-26/+35
2021-04-30target/arm: Introduce CPUARMTBFlagsRichard Henderson5-37/+57
2021-04-30target/arm: Add wrapper macros for accessing tbflagsRichard Henderson5-92/+101
2021-04-30target/arm: Rename TBFLAG_ANY, PSTATE_SSRichard Henderson4-5/+5
2021-04-30target/arm: Rename TBFLAG_A32, SCTLR_BRichard Henderson3-3/+3
2021-04-30target/arm: Fix decode of align in VLDST_singleRichard Henderson2-4/+4
2021-04-30target/arm: Remove log2_esize parameter to gen_mte_checkNRichard Henderson3-11/+10