riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-05-05	Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pul...	Peter Maydell	19	-19/+2
2021-05-03	Merge remote-tracking branch 'remotes/philmd/tags/mips-20210502' into staging	Peter Maydell	44	-2136/+2385
2021-05-02	Do not include exec/address-spaces.h if it's not really necessary	Thomas Huth	5	-5/+0
2021-05-02	Do not include sysemu/sysemu.h if it's not really necessary	Thomas Huth	5	-5/+0
2021-05-02	hw: Do not include qemu/log.h if it is not necessary	Thomas Huth	7	-7/+0
2021-05-02	vmstate: Constify some VMStateDescriptions	Keqian Zhu	2	-2/+2
2021-05-02	target/mips: Move TCG source files under tcg/ sub directory	Philippe Mathieu-Daudé	25	-43/+41
2021-05-02	target/mips: Move CP0 helpers to sysemu/cp0.c	Philippe Mathieu-Daudé	4	-107/+129
2021-05-02	target/mips: Move exception management code to exception.c	Philippe Mathieu-Daudé	6	-163/+182
2021-05-02	target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.c	Philippe Mathieu-Daudé	5	-350/+340
2021-05-02	target/mips: Move helper_cache() to tcg/sysemu/special_helper.c	Philippe Mathieu-Daudé	5	-37/+47
2021-05-02	target/mips: Move Special opcodes to tcg/sysemu/special_helper.c	Philippe Mathieu-Daudé	7	-122/+151
2021-05-02	target/mips: Restrict CPUMIPSTLBContext::map_address() handlers scope	Philippe Mathieu-Daudé	2	-12/+7
2021-05-02	target/mips: Move tlb_helper.c to tcg/sysemu/	Philippe Mathieu-Daudé	5	-9/+6
2021-05-02	target/mips: Restrict mmu_init() to TCG	Philippe Mathieu-Daudé	3	-4/+3
2021-05-02	target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolder	Philippe Mathieu-Daudé	7	-167/+179
2021-05-02	target/mips: Restrict cpu_mips_get_random() / update_pagemask() to TCG	Philippe Mathieu-Daudé	2	-4/+9
2021-05-02	target/mips: Move physical addressing code to sysemu/physaddr.c	Philippe Mathieu-Daudé	4	-255/+282
2021-05-02	target/mips: Move sysemu specific files under sysemu/ subfolder	Philippe Mathieu-Daudé	5	-6/+11
2021-05-02	target/mips: Move cpu_signal_handler definition around	Philippe Mathieu-Daudé	1	-5/+4
2021-05-02	target/mips: Add simple user-mode mips_cpu_tlb_fill()	Philippe Mathieu-Daudé	2	-10/+36
2021-05-02	target/mips: Add simple user-mode mips_cpu_do_interrupt()	Philippe Mathieu-Daudé	5	-5/+39
2021-05-02	target/mips: Introduce tcg-internal.h for TCG specific declarations	Philippe Mathieu-Daudé	2	-4/+23
2021-05-02	target/mips: Extract load/store helpers to ldst_helper.c	Philippe Mathieu-Daudé	3	-259/+289
2021-05-02	target/mips: Merge do_translate_address into cpu_mips_translate_address	Philippe Mathieu-Daudé	3	-24/+9
2021-05-02	target/mips: Declare mips_env_set_pc() inlined in "internal.h"	Philippe Mathieu-Daudé	3	-20/+14
2021-05-02	target/mips: Turn printfpr() macro into a proper function	Philippe Mathieu-Daudé	1	-27/+23
2021-05-02	target/mips: Restrict mips_cpu_dump_state() to cpu.c	Philippe Mathieu-Daudé	3	-78/+77
2021-05-02	target/mips: Optimize CPU/FPU regnames[] arrays	Philippe Mathieu-Daudé	3	-4/+4
2021-05-02	target/mips: Make CPU/FPU regnames[] arrays global	Philippe Mathieu-Daudé	4	-14/+17
2021-05-02	target/mips: Move msa_reset() to new source file	Philippe Mathieu-Daudé	3	-36/+61
2021-05-02	target/mips: Move IEEE rounding mode array to new source file	Philippe Mathieu-Daudé	3	-8/+19
2021-05-02	target/mips: Simplify meson TCG rules	Philippe Mathieu-Daudé	1	-3/+2
2021-05-02	target/mips: Make check_cp0_enabled() return a boolean	Philippe Mathieu-Daudé	2	-2/+9
2021-05-02	target/mips: Migrate missing CPU fields	Philippe Mathieu-Daudé	1	-6/+15
2021-05-02	target/mips: Remove spurious LOG_UNIMP of MTHC0 opcode	Philippe Mathieu-Daudé	1	-0/+1
2021-05-02	target/mips: Add missing CP0 check to nanoMIPS RDPGPR / WRPGPR opcodes	Philippe Mathieu-Daudé	1	-0/+2
2021-05-02	target/mips: Fix CACHEE opcode (CACHE using EVA addressing)	Philippe Mathieu-Daudé	1	-1/+3
2021-05-01	Hexagon (target/hexagon) CABAC decode bin	Taylor Simpson	6	-0/+165
2021-05-01	Hexagon (target/hexagon) load into shifted register instructions	Taylor Simpson	3	-0/+88
2021-05-01	Hexagon (target/hexagon) load and unpack bytes instructions	Taylor Simpson	5	-0/+186
2021-05-01	Hexagon (target/hexagon) bit reverse (brev) addressing	Taylor Simpson	7	-0/+50
2021-05-01	Hexagon (target/hexagon) circular addressing	Taylor Simpson	7	-23/+346
2021-05-01	Hexagon (target/hexagon) add A4_addp_c/A4_subp_c	Taylor Simpson	4	-0/+65
2021-05-01	Hexagon (target/hexagon) add A6_vminub_RdP	Taylor Simpson	4	-0/+60
2021-05-01	Hexagon (target/hexagon) add A5_ACS (vacsh)	Taylor Simpson	5	-0/+60
2021-05-01	Hexagon (target/hexagon) add F2_sfinvsqrta	Taylor Simpson	7	-1/+77
2021-05-01	Hexagon (target/hexagon) add F2_sfrecipa instruction	Taylor Simpson	7	-3/+101
2021-05-01	Hexagon (target/hexagon) compile all debug code	Taylor Simpson	6	-94/+81
2021-05-01	Hexagon (target/hexagon) move QEMU_GENERATE to only be on during macros.h	Taylor Simpson	1	-1/+2