| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2019-02-28 | target/xtensa: implement PREFCTL SR | Max Filippov | 2 | -0/+17 |
| 2019-02-28 | target/xtensa: prioritize load/store in FLIX bundles | Max Filippov | 2 | -5/+36 |
| 2019-02-28 | target/xtensa: break circular register dependencies | Max Filippov | 1 | -4/+123 |
| 2019-02-28 | target/xtensa: reorganize access to boolean registers | Max Filippov | 1 | -8/+42 |
| 2019-02-28 | target/xtensa: reorganize access to MAC16 registers | Max Filippov | 1 | -94/+92 |
| 2019-02-28 | target/xtensa: reorganize register handling in translators | Max Filippov | 3 | -344/+386 |
| 2019-02-28 | target/xtensa: only rotate window in the retw helper | Max Filippov | 3 | -9/+10 |
| 2019-02-28 | target/xtensa: move WINDOW_BASE SR update to postprocessing | Max Filippov | 4 | -20/+28 |
| 2019-02-28 | target/xtensa: add generic instruction post-processing | Max Filippov | 2 | -8/+33 |
| 2019-02-28 | target/xtensa: sort FLIX instruction opcodes | Max Filippov | 2 | -8/+221 |
| 2019-02-18 | target/xtensa: implement wide branches and loops | Max Filippov | 1 | -27/+102 |
| 2019-02-18 | target/xtensa: allow multiple names for single opcode | Max Filippov | 3 | -60/+60 |
| 2019-02-18 | target/xtensa: don't require opcode table sorting | Max Filippov | 3 | -16/+42 |
| 2019-02-18 | target/xtensa: move xtensa_finalize_config to xtensa_core_class_init | Max Filippov | 3 | -19/+19 |
| 2019-02-18 | target/xtensa: fixup test_mmuhifi_c3 overlay | Max Filippov | 1 | -661/+661 |
| 2019-02-11 | target/xtensa: get rid of gen_callw[i] | Max Filippov | 1 | -21/+14 |
| 2019-02-10 | target/xtensa: don't specify windowed registers manually | Max Filippov | 3 | -484/+12 |
| 2019-02-08 | target/xtensa/import_core.sh: don't add duplicate 'static' | Max Filippov | 1 | -1/+1 |
| 2019-02-05 | Merge remote-tracking branch 'remotes/xtensa/tags/20190204-xtensa' into staging | Peter Maydell | 11 | -16/+37006 |
| 2019-02-04 | target/ppc: remove various HOST_WORDS_BIGENDIAN hacks in int_helper.c | Mark Cave-Ayland | 1 | -110/+45 |
| 2019-02-04 | target/ppc: remove ROTRu32 and ROTRu64 macros from int_helper.c | Mark Cave-Ayland | 1 | -28/+20 |
| 2019-02-04 | target/ppc: simplify VEXT_SIGNED macro in int_helper.c | Mark Cave-Ayland | 1 | -7/+7 |
| 2019-02-04 | target/ppc: eliminate use of EL_IDX macros from int_helper.c | Mark Cave-Ayland | 1 | -39/+27 |
| 2019-02-04 | target/ppc: eliminate use of HI_IDX and LO_IDX macros from int_helper.c | Mark Cave-Ayland | 1 | -95/+85 |
| 2019-02-04 | target/ppc: rework vmul{e,o}{s,u}{b,h,w} instructions to use Vsr* macros | Mark Cave-Ayland | 1 | -21/+27 |
| 2019-02-04 | target/ppc: rework vmrg{l,h}{b,h,w} instructions to use Vsr* macros | Mark Cave-Ayland | 1 | -35/+19 |
| 2019-02-04 | ppc: remove the interrupt presenters from under PowerPCCPU | Cédric Le Goater | 1 | -5/+0 |
| 2019-02-04 | target/ppc: implement complete set of Vsr* macros | Mark Cave-Ayland | 1 | -1/+8 |
| 2019-02-04 | target/ppc/kvm: Drop useless include directive | Greg Kurz | 1 | -1/+0 |
| 2019-02-01 | target/arm: fix decoding of B{,L}RA{A,B} | Remi Denis-Courmont | 1 | -1/+1 |
| 2019-02-01 | target/arm: fix AArch64 virtual address space size | Remi Denis-Courmont | 1 | -1/+1 |
| 2019-02-01 | target/arm: Always enable pac keys for user-only | Richard Henderson | 2 | -60/+3 |
| 2019-02-01 | arm: Clarify the logic of set_pc() | Julia Suvorova | 3 | -19/+25 |
| 2019-02-01 | target/arm: Enable API, APK bits in SCR, HCR | Richard Henderson | 1 | -0/+6 |
| 2019-02-01 | target/arm: Add a timer to predict PMU counter overflow | Aaron Lindsay OS | 3 | -2/+92 |
| 2019-02-01 | target/arm: Send interrupts on PMU counter overflow | Aaron Lindsay OS | 1 | -10/+51 |
| 2019-02-01 | target/arm/translate-a64: Fix mishandling of size in FCMLA decode | Peter Maydell | 1 | -1/+1 |
| 2019-02-01 | target/arm/translate-a64: Fix FCMLA decoding error | Peter Maydell | 1 | -1/+1 |
| 2019-02-01 | target/arm/translate-a64: Don't underdecode SDOT and UDOT | Peter Maydell | 1 | -1/+1 |
| 2019-02-01 | target/arm/translate-a64: Don't underdecode FP insns | Peter Maydell | 1 | -1/+21 |
| 2019-02-01 | target/arm/translate-a64: Don't underdecode add/sub extended register | Peter Maydell | 1 | -1/+2 |
| 2019-02-01 | target/arm/translate-a64: Don't underdecode SIMD ld/st single | Peter Maydell | 1 | -1/+10 |
| 2019-02-01 | target/arm/translate-a64: Don't underdecode SIMD ld/st multiple | Peter Maydell | 1 | -1/+6 |
| 2019-02-01 | target/arm/translate-a64: Don't underdecode PRFM | Peter Maydell | 1 | -1/+1 |
| 2019-02-01 | target/arm/translate-a64: Don't underdecode system instructions | Peter Maydell | 1 | -1/+5 |
| 2019-01-31 | Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-reques... | Peter Maydell | 33 | -39/+39 |
| 2019-01-30 | target/m68k: Fix LGPL information in the file headers | Thomas Huth | 6 | -10/+10 |
| 2019-01-30 | target/s390x: Fix LGPL version in the file header comments | Thomas Huth | 9 | -9/+9 |
| 2019-01-30 | target/tricore: Fix LGPL version number | Thomas Huth | 10 | -10/+10 |
| 2019-01-30 | target/openrisc: Fix LGPL version number | Thomas Huth | 7 | -7/+7 |
