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2021-06-03softfloat: Introduce Floatx80RoundPrecRichard Henderson3-93/+126
2021-06-03hvf: Simplify post reset/init/loadvm hooksAlexander Graf1-1/+4
2021-06-03hvf: Introduce hvf vcpu structAlexander Graf8-234/+236
2021-06-03hvf: Remove hvf-accel-ops.hAlexander Graf1-2/+0
2021-06-03hvf: Use cpu_synchronize_state()Alexander Graf1-5/+4
2021-06-03hvf: Split out common code on vcpu init and destroyAlexander Graf1-21/+2
2021-06-03hvf: Move hvf internal definitions into common headerAlexander Graf1-30/+1
2021-06-03hvf: Move cpu functions into common directoryAlexander Graf3-306/+0
2021-06-03hvf: Move vcpu thread functions into common directoryAlexander Graf4-171/+1
2021-06-03hvf: Move assert_hvf_ok() into common directoryAlexander Graf1-32/+1
2021-06-03target/arm: Enable BFloat16 extensionsRichard Henderson3-0/+7
2021-06-03target/arm: Implement bfloat widening fma (indexed)Richard Henderson7-1/+82
2021-06-03target/arm: Implement bfloat widening fma (vector)Richard Henderson7-4/+73
2021-06-03target/arm: Implement bfloat16 matrix multiply accumulateRichard Henderson7-3/+81
2021-06-03target/arm: Implement bfloat16 dot product (indexed)Richard Henderson7-9/+80
2021-06-03target/arm: Implement bfloat16 dot product (vector)Richard Henderson7-0/+89
2021-06-03target/arm: Implement vector float32 to bfloat16 conversionRichard Henderson9-0/+95
2021-06-03target/arm: Implement scalar float32 to bfloat16 conversionRichard Henderson5-0/+51
2021-06-03target/arm: Unify unallocated path in disas_fp_1srcRichard Henderson1-9/+6
2021-06-03target/arm: Add isar_feature_{aa32, aa64, aa64_sve}_bf16Richard Henderson1-0/+15
2021-06-03target/arm: use raise_exception_ra for stack limit exceptionJamie Iles2-10/+4
2021-06-03target/arm: use raise_exception_ra for MTE check failureJamie Iles1-9/+3
2021-06-03target/arm: fold do_raise_exception into raise_exceptionJamie Iles1-10/+2
2021-06-03target/arm: fix missing exception classJamie Iles1-2/+9
2021-06-03target/arm: Mark LDS{MIN,MAX} as signed operationsRichard Henderson1-3/+10
2021-06-03target/arm: Allow board models to specify initial NS VTORPeter Maydell2-0/+12
2021-06-03target/arm: Make FPSCR.LTPSIZE writable for MVEPeter Maydell3-4/+9
2021-06-03target/arm: Implement M-profile VPR registerPeter Maydell3-0/+63
2021-06-03target/arm: Fix return values in fp_sysreg_checks()Peter Maydell1-3/+3
2021-06-03target/arm: Add MVE check to VMOV_reg_sp and VMOV_reg_dpPeter Maydell1-2/+13
2021-06-03target/arm: Move fpsp/fpdp isar check into callers of do_vfp_2op_sp/dpPeter Maydell1-18/+19
2021-06-03target/arm: Update feature checks for insns which are "MVE or FP"Peter Maydell1-19/+29
2021-06-03target/arm: Add isar feature check functions for MVEPeter Maydell1-0/+22
2021-06-03target/ppc: fix single-step exception regressionLuis Pires1-3/+2
2021-06-03target/ppc: Move cmp/cmpi/cmpl/cmpli to decodetreeMatheus Ferst3-52/+45
2021-06-03target/ppc: Move addpcis to decodetreeMatheus Ferst3-9/+13
2021-06-03target/ppc: Implement vcfuged instructionMatheus Ferst3-0/+64
2021-06-03target/ppc: Implement cfuged instructionMatheus Ferst4-0/+79
2021-06-03target/ppc: Implement setbc/setbcr/stnbc/setnbcr instructionsMatheus Ferst2-0/+33
2021-06-03target/ppc: Implement prefixed integer store instructionsRichard Henderson2-0/+16
2021-06-03target/ppc: Move D/DS/X-form integer stores to decodetreeRichard Henderson3-82/+49
2021-06-03target/ppc: Implement prefixed integer load instructionsRichard Henderson2-0/+31
2021-06-03target/ppc: Move D/DS/X-form integer loads to decodetreeRichard Henderson3-123/+150
2021-06-03target/ppc: Implement PNOPRichard Henderson2-0/+78
2021-06-03target/ppc: Move ADDI, ADDIS to decodetree, implement PADDIRichard Henderson4-29/+64
2021-06-03target/ppc: Add infrastructure for prefixed insnsRichard Henderson6-6/+95
2021-06-03target/ppc: Move page crossing check to ppc_tr_translate_insnRichard Henderson1-3/+6
2021-06-03target/ppc: Introduce macros to check isa extensionsRichard Henderson1-0/+26
2021-06-03target/ppc: powerpc_excp: Consolidade TLB miss codeFabiano Rosas1-35/+2
2021-06-03target/ppc: powerpc_excp: Remove dump_syscall_vectoredFabiano Rosas1-13/+1