riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-01-11	target/mips: Extract trap code into env->error_code	Richard Henderson	3	-8/+24
2022-01-11	target/mips: Extract break code into env->error_code	Richard Henderson	4	-5/+16
2022-01-09	target/m68k: don't word align SP in stack frame if M68K_FEATURE_UNALIGNED_DAT...	Mark Cave-Ayland	1	-1/+4
2022-01-08	target/riscv: Implement the stval/mtval illegal instruction	Alistair Francis	3	-0/+8
2022-01-08	target/riscv: Fixup setting GVA	Alistair Francis	1	-15/+6
2022-01-08	target/riscv: Set the opcode in DisasContext	Alistair Francis	1	-0/+2
2022-01-08	target/riscv: actual functions to realize crs 128-bit insns	Frédéric Pétrot	3	-30/+175
2022-01-08	target/riscv: modification of the trans_csrxx for 128-bit support	Frédéric Pétrot	1	-43/+158
2022-01-08	target/riscv: helper functions to wrap calls to 128-bit csr insns	Frédéric Pétrot	4	-0/+69
2022-01-08	target/riscv: adding high part of some csrs	Frédéric Pétrot	2	-0/+6
2022-01-08	target/riscv: support for 128-bit M extension	Frédéric Pétrot	6	-13/+295
2022-01-08	target/riscv: support for 128-bit arithmetic instructions	Frédéric Pétrot	5	-49/+222
2022-01-08	target/riscv: support for 128-bit shift instructions	Frédéric Pétrot	4	-44/+270
2022-01-08	target/riscv: support for 128-bit U-type instructions	Frédéric Pétrot	2	-4/+25
2022-01-08	target/riscv: support for 128-bit bitwise instructions	Frédéric Pétrot	1	-2/+19
2022-01-08	target/riscv: accessors to registers upper part and 128-bit load/store	Frédéric Pétrot	4	-10/+163
2022-01-08	target/riscv: moving some insns close to similar insns	Frédéric Pétrot	1	-17/+17
2022-01-08	target/riscv: setup everything for rv64 to support rv128 execution	Frédéric Pétrot	3	-0/+26
2022-01-08	target/riscv: array for the 64 upper bits of 128-bit registers	Frédéric Pétrot	4	-1/+35
2022-01-08	target/riscv: separation of bitwise logic and arithmetic helpers	Frédéric Pétrot	3	-9/+36
2022-01-08	target/riscv: additional macros to check instruction support	Frédéric Pétrot	1	-4/+16
2022-01-08	exec/memop: Adding signedness to quad definitions	Frédéric Pétrot	32	-226/+226
2022-01-08	target/riscv: Fix position of 'experimental' comment	Philipp Tomsich	1	-1/+2
2022-01-08	target/riscv: rvv-1.0: Call the correct RVF/RVD check function for narrowing ...	Frank Chang	1	-8/+24
2022-01-08	target/riscv: rvv-1.0: Call the correct RVF/RVD check function for widening f...	Frank Chang	1	-9/+25
2022-01-08	target/riscv: rvv-1.0: Call the correct RVF/RVD check function for widening f...	Frank Chang	1	-4/+8
2022-01-08	target/riscv: Enable the Hypervisor extension by default	Alistair Francis	1	-1/+1
2022-01-08	target/riscv: Mark the Hypervisor extension as non experimental	Alistair Francis	1	-1/+1
2022-01-08	target/riscv/pmp: fix no pmp illegal intrs	Nikita Shubin	1	-1/+2
2022-01-07	target/arm: Add missing FEAT_TLBIOS instructions	Idan Horowitz	1	-0/+32
2022-01-06	linux-user/nios2: Map a real kuser page	Richard Henderson	1	-9/+0
2022-01-06	linux-user/nios2: Properly emulate EXCP_TRAP	Richard Henderson	2	-2/+17
2022-01-06	target/sh4: Implement prctl_unalign_sigbus	Richard Henderson	2	-16/+38
2022-01-06	target/hppa: Implement prctl_unalign_sigbus	Richard Henderson	2	-5/+19
2022-01-06	target/alpha: Implement prctl_unalign_sigbus	Richard Henderson	2	-9/+27
2022-01-04	target/ppc: do not call hreg_compute_hflags() in helper_store_mmcr0()	Daniel Henrique Barboza	1	-1/+6
2022-01-04	target/ppc: Use env->pnc_cyc_cnt	Richard Henderson	1	-98/+9
2022-01-04	target/ppc: Rewrite pmu_increment_insns	Richard Henderson	1	-29/+49
2022-01-04	target/ppc: Cache per-pmc insn and cycle count settings	Richard Henderson	6	-20/+58
2022-01-04	target/ppc: powerpc_excp: Stop passing excp_model around	Fabiano Rosas	1	-22/+21
2022-01-04	target/ppc: powerpc_excp: Move system call vectored code together	Fabiano Rosas	1	-8/+5
2022-01-04	target/ppc: powerpc_excp: Set vector earlier	Fabiano Rosas	1	-8/+8
2022-01-04	target/ppc: powerpc_excp: Add excp_vectors bounds check	Fabiano Rosas	1	-3/+4
2022-01-04	target/ppc: powerpc_excp: Set alternate SRRs directly	Fabiano Rosas	1	-15/+8
2022-01-04	target/ppc: do not silence snan in xscvspdpn	Matheus Ferst	1	-4/+1
2022-01-04	ppc/ppc405: Dump specific registers	Cédric Le Goater	1	-6/+21
2022-01-04	ppc/ppc405: Introduce a store helper for SPR_40x_PID	Cédric Le Goater	3	-1/+10
2022-01-04	ppc/ppc405: Restore TCR and STR write handlers	Cédric Le Goater	6	-2/+30
2022-01-04	ppc/ppc405: Activate MMU logs	Cédric Le Goater	2	-139/+122
2022-01-04	target/ppc: Print out literal exception names in logs	Cédric Le Goater	1	-1/+74